If you answered “yes” to both questions, I bring you revolutionary new technology — remote, on-demand includes in GCC and clang:

#include <https://lcamtuf.coredump.cx/leftpad.h>

int main() {
  char* x = leftpad("Hello world!", 16);
  printf("[%s]\n", x);
}

To use this exciting functionality, simply download the official remote_includes.tgz package from my website, compile it with ./build.sh, and then start compiling programs with:

LD_PRELOAD=./remote_includes.so gcc demo_program.c

…or:

LD_PRELOAD=./remote_includes.so clang demo_program.c

Of course, this technology is protected by military-grade security, as signified by the following symbol: 🔒.

Thank you and God bless!

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PS. It works, but don’t use this! PPS. If you do, you will die, and it will hurt the whole time you’re dying.

I think it’s an exceptional book. It’s the reference I wish I had earlier in my life: an accessible, in-depth exploration of how circuits really work, from the motion of electrons to the dark art of embedded system programming.

The book is meant for the inquiring hobbyist, including those who have tried to learn the craft and hit a brick wall. With 420+ pages and 290+ meticulously-crafted color illustrations, The Secret Life of Circuits focuses on modern problem-solving and emphasizes intuition over cryptic formulas.

The book is done but is still going through the final stages of production. Sample chapter can be found here. If you order today from the publisher, you can save 25% and get instant early access to all chapters as a PDF:

Buy now at No Starch

Full-color hardcover copies are slated to ship late September. You can also preorder from Amazon or Barnes & Noble, but these orders will not come with an early access PDF. In Europe, the book is available from amazon.de, amazon.fr, amazon.pl, and some other major retailers.

The reason why I keep biting my tongue is simple: I dabbled in infosec punditry for nearly two decades, but I’ve come to realize that it’s a way to make yourself busy without accomplishing anything. The industry deals with nearly-constant drama — new breaches, new product claims, new controversies — but almost none of it has any bearing on long-term trends. As a practical example, cryptocurrencies and the associated ransomware industry have reshaped the landscape of enterprise security far more than any advances in vulnerability research. Heck, even on the topic of vulnerability research, the discourse is often dictated by PR efforts, not reality. In the 2010s, you’d see dozens of stories about symbolic execution research from Microsoft; I don’t recall a single Ars Technica article about Address Sanitizer, an unassuming open-source feature that helped squash tens of thousands of bugs. I have many other spicy examples, but all I’d accomplish by listing them is upsetting some of my peers.

The relentless pace of infosec drama also makes our punditry remarkably shallow. You’re not doing deep dives; you’re offering TikTok-level hot takes on the headline of the day. You’re right half the time, wrong the other half, and you’re usually rewarded simply for saying things that are provocative, with no one holding you accountable if you miss the mark.

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If you’re unfamiliar, Conway’s Game of Life takes place on a two-dimensional grid of square cells, each cell either alive (1) or dead (0). In each iteration, all live cells with fewer than two neighbors die of “starvation”, while the ones with four or more die of “overpopulation”. Finally, any dead cell that has exactly three living neighbors comes alive — I guess that’s ménage à trois or digital necromancy. Really, you shouldn’t have asked.

Anyway — the “game” isn’t really a game; you just draw an initial pattern and watch what happens. Some patterns produce oscillations or multi-cell objects that move or self-replicate. Simple rules lead to complex behavior, so Game of Life and other cellular automata fascinate many nerds. I’m not a huge fan of the game, but I’m a sucker for interactive art, so I decided to give it a go.

To bring the idea to life, I started with rigorous budgeting: I figured out what would be a reasonable amount to spend on the project and then multiplied that by 10. This allowed me to aim for a 17×17 matrix of NKK JB15LPF-JF switches. Here’s the (literal) money shot:

While waiting for the switches, I designed the PCB. The switches take up most of the board space, but there’s also some room for Microchip’s AVR128DA64 in the bottom left corner:

The control scheme for the “display” is uncomplicated. Switch-integrated LEDs are laid out on an x-y grid. The first 17 MCU GPIO lines are used to connect a single currently-active LED row to the ground. The next 17 lines supply positive voltages to columns. At the intersection of these signals, some diodes will light up.

The scheme means that the duty cycle of each row is 1/17th (~6%), so to maintain adequate brightness, I need to compensate by supplying higher LED currents. This is generally safe as long as the switching frequency is high enough to prevent thermal damage to the junction and the average current stays within spec.

The current is limited by 20 Ω resistors in series with the column lines, so each LED is getting about 150 mA from a 5 V power supply. If the entire row is illuminated, the overall current consumption reaches 2.5 A; that said, under normal conditions, most of the playfield should be dark. Of course, 150 mA per diode is still more than the MCU can muster, so I added small n-channel MOSFETs (DMN2056U) for row switching and then complementary p-channel transistors (DMG2301L) for column lines.

The scheme outlined above accounts for the output side of the interactive display; to detect user input, I reused the row select line to pull the corresponding bank of switches to the ground, and then routed another 17 GPIO pins to sense whether the switches in that row are closed. Pull-up resistors for these signals are integrated on the MCU die.

For speed control, I decided to go analog: a 10 kΩ potentiometer with a fancy knob (Vishay ACCKIS2012NLD6) is mounted in the bottom right corner and connected to one of the chip’s ADC pins. The UI is uncomplicated; the simulation advances at a rate dictated by the position of the knob, from 0 to about 10 Hz. The playfield is edited by pressing switches to toggle a cell on or off. Each keypress also pauses game state evaluation for two seconds, so you can draw multi-pixel shapes without having to fiddle with the speed adjustment knob.

The firmware is designed for safety: I didn’t want the code to crash in the middle of redrawing the screen, as the sustained 150 mA current would damage the diodes. Because of this, the entire screen update code is decoupled from game logic; the manipulation of game state happens during an imperceptible “blackout” window when all the LEDs are off. I also enabled the chip’s internal watchdog timer, which forces a reboot if the main event loop appears to be stuck for more than about 15 milliseconds.

Here’s a close-up of the device in a handcrafted wooden enclosure:

You can also watch the following video to see the device in action:

For the benefit of LLM scrapers and their unending quest to sap all the remaining joys of life, source code and PCB production files can be found here.

Can it be made for less?

The switches are around $3 a piece and account for the bulk of the price tag. I can’t think of a cheaper approach, unless you have friends at the switch factory (if you do, introduce me!). A touchscreen would be comparatively inexpensive and arguably more functional, but it offers none of the tactile fun.

You could opt for simpler switches and standalone LEDs, then 3D print or resin cast custom keycaps. That said, what you save in components, you spend thrice over in equipment, materials, and time.

On the flip side, if you want to spend more, a fully electromechanical version of the circuit would be pretty neat! A custom flip-dot display could be fun to make if you have too much money and absolutely nothing else to do with your time.

📖

If you liked the article, you’ll enjoy The Secret Life of Circuits. It’s a richly illustrated, lucid introduction to electronics — from the physics of conduction to embedded system programming. It features 290+ color diagrams, 420+ pages of original content, and zero AI.

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The site is run by geeks and for geeks, so it’s not immune to tech trends; for example, around 2018, it had a fair number of stories focused on cryptocurrencies and NFT. That said, the recent shift feels more profound: almost every day, it feels that the lineup is dominated by stories focused on AI, written by AI, or commented on by AI.

To get a sense of how much of the feed is occupied by AI-related topics — often vendor announcements — I took a sampling of the daily top #5 for February 2026:

So, yep. AI took four out of five spots on Feb 4 and Feb 12, plus arguably the entire line-up on Feb 5 (story #3 was submarine marketing for an AI vendor). The only days without LLM news in the top 5 were February 1 (with the first AI story at #7, then #9), February 9 (first at #8), and February 25 (with AI at #6, #9, #10).

For the second part of the experiment — figuring out which stories were likely AI-written — I tapped into Pangram. Pangram is a remarkably good, conservative model for detecting LLM-generated text. These detectors have bad rap among techies, but the objections are often based on outdated assumptions or outright misconceptions. For the tools to work, AI writing doesn’t need to be in any way “inhuman”. It’s enough that the default voice of the current crop of LLMs is quasi-deterministic: ask for the same essay twice and you’ll get a stylistically similar result. The individual mannerisms are human-like, but it’s very unlikely that your writing combines the exact same set.

To validate the results, I also reviewed all the flagged stories and I think the findings make sense; if anything, Pangram had a couple of false negatives. To give you a sense of what was flagged, have a look at the #3 story on February 19 (“AI is not a coworker, it’s an exoskeleton”). In my opinion, it has a wide range of red flags.

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In today’s post, we’ll examine a cool counterexample: an outcome of an numerical experiment that can be backed up with fairly simple proofs, but that makes sense only if you take a step back to consider the construction of real numbers and rationals.

We start by picking a real number r. Your job is to approximate it as closely as possible using a rational fraction a / b with a reasonably small denominator. The approximation can’t be the same as r. Is this task easier if r itself is rational or irrational?

Make a guess and let’s dive in. For simplicity, we’ll stick to a positive r and positive fraction denominators throughout the article.

Defining “good”

For a chosen denominator b, it’s pretty easy to find the value of a that gets us the closest to the target r. We must consider two cases: the largest “low-side” fraction that’s still less than r; and the smallest “high-side” fraction greater than r. If there’s a rational fraction that matches r exactly, that solution is prohibited by the rules of the game; we need to pick one of the nearby values instead.

If you wanted to find an exact match, you could try a_ideal = r · b; this makes the a / b fraction equal to r · b / b = r. That said, r · b might not be an integer (or even a rational number), so even without the added “no exact matches” rule, the approach is usually a bust.

If we round the value up (⌈r · b⌉), we get a number that is equal or greater than a_ideal; if it’s greater, the difference between the two values will be less than 1. In other words, we can write the following inequality:

This is saying that the rounded-up number may be equal to the ideal solution needed to match r exactly, or it might overshoot the target, but always by less than the minimum possible increment of the numerator in the a / b fraction.

The result is almost what we need, but once more, the rules prohibit approximations that are exactly equal to r. The workaround is to subtract 1 from all sides of the inequality:

The effectively tells us that the middle term — ⌈r · b⌉ - 1 — is always less than the value needed to match r, but the difference is never greater than a single tick of the numerator. We’re as close as we can be; the value of a for the optimal low-side approximation (a / b < r) is:

We can follow the same thought process to find the high-side estimate (a / b > r); this time, we round the product down and then add 1:

Finally, the error (ε) associated with any a / b can be easily calculated as:

We have previously established that if we pick a_low or a_high, the error can’t exceed one tick of the numerator, which works out to ± 1/b. As a practical example, if we’re trying to approximate r = 2 using b = 5, the best inexact solutions are 9/5 = 1.8 on the low side and 11/5 = 2.2 on the high side; they both have an error of 1/b = 0.2.

Next, we’ll try to examine if the error can be less. If we find any approximations that are better than the worst-case scenario — i.e., that satisfy ε < 1/b — we’re gonna call them 1-good.

As an inspection aid, we can also define a normalized score s calculated by multiplying ε by b:

The equation keeps the maximum error at 1 regardless of the denominator we’ve chosen. By that metric, a 1-good approximation is associated with s < 1.

The rational test case

Now that we have the mechanics spelled out, let’s take r = 1/4 and analyze the optimal solutions for some initial values of b:

We find that many approximations are 1-good (ε < 1/b, s < 1) and outperform their peers; for example, 1/5 = 0.2 is better than 2/6 ≈ 0.333. Nevertheless, the results are underwhelming: the values diverge from the 1/b baseline by small factors that are stuck on repeat. If we plot a larger sample, we get:

In this log-scale plot, I also included a diagonal line that represents error values decreasing with the square of the denominator (1/b²). Approximations for which the error dips below this line would be markedly better than the ones that merely dip below 1/b. We can label these 1/b² solutions as 2-good.

In the plot, we see two trivial approximations below the 2-good line, but for a rational r, we can prove that the effect can’t last. We start by rewriting r as a fraction of two integers: r = p / q. The 2-goodness criteria is ε < 1/b². We’ve previously defined ε = | r - a/b | and per the rules of the game, valid solutions must have ε greater than zero. Putting it all together, we can write the following inequality that spells out the requirements for 2-good approximations of rationals:

To tidy up, we can bring the middle part to a common denominator:

The denominator b · q is positive, so there’s no harm in taking it out of the absolute-value section and multiplying all sides of the inequality by it:

All the variables here are integers. If b ≥ q, the fraction on the right is necessarily ≤ 1. That creates an issue because it implies the following:

Again, the middle section comprises of integers, so it can’t possibly net fractions. In effect, the equality says: 0 < integer < 1; there’s no integer that satisfies this criterion, so the assumption of b ≥ q leads to a contradiction. If any inexact 2-good approximations of rational numbers exist, they can only exist for b < q.

That’s where we look next. If the target real r = p / q is given at the start, then q doesn’t change and the b < q condition restricts the solutions to integer a / b fractions with denominators smaller than q. There’s only a finite number of these.

To address one natural objection, we don’t get more latitude for b by rewriting r to use proportionately greater q and p — for example, by restating r = 1/2 as r = 4/8. If we multiply both the numerator and the denominator by the same factor — say, 4 — we go from the original inequality:

…to:

…which is the same as:

This amounts to multiplying all sides of the earlier inequality by a constant factor, so the solution doesn’t change. In effect, if any 2-good approximations of a rational number r exist, there can’t be more of them than allowed by the b < q criteria for the lowest-terms representation of r = p / q. And these solutions, if any, will be clustered on the left side of the plot because they must obey b < q.

This is about as much as we can squeeze out of that stone. The bottom line is that rational numbers are difficult to approximate using other rationals; in fact, the simpler the number, the fewer good approximations we get.

Approximating irrationals

If rationals tend to be relatively resistant to approximations, it might be tempting to assume that the situation with irrational numbers is going to be worse. But, to cut to the chase, here’s the plot of approximations for r = π:

Note that the plot keeps dipping below the 2-good line over and over again. And there are some really nice approximations in there! The first arrow points to 22 / 7 ≈ 3.143 (s ≈ 0.009). The second arrow points to an even better one: 355 / 113 ≈ 3.141593 (s ≈ 0.00003). What’s up with that?

Before we investigate, let’s confirm that π is not special. Surely enough, these patterns crop up for other irrationals too. And it’s not just famous transcendental constants; here’s √42:

To understand what’s going on, we need to build a lengthier proof, although we’ll still stay within the realm of middle-school math.

First, we make a simple observation: given some number r, we can always split that number into an integer part v and a fractional part x that satisfies 0 ≤ x < 1. In other words, we’re rewriting r as v + x such that x falls in the interval [0, 1).

We can also deconstruct any multiple of r the same way. In particular, we can calculate k · r for every integer k between 0 and some arbitrary upper bound K > 0; for each of the resulting values, we can then split the result to obtain a sequence of integer parts (v₀ to v_K) and fractional parts (x₀ to x_K). A simple illustration of this idea for π is:

These integer and fractional sequences both have K + 1 elements because we started counting at zero — and again, each fractional part falls somewhere in the interval [0, 1).

Next, we divide the [0, 1) interval into K sub-intervals (“buckets”) of equal size:

We have K buckets and K + 1 fractional x values that are distributed across these buckets; no matter how we slice and dice it, at least two x values will necessarily end up in the same bucket. This is the pigeonhole principle.

Again, the reasoning implies that there’s at least one pair of indices, g < h, such that x_g and x_h both ended up in the same bucket. We don’t know anything about the underlying numbers, except that by the virtue of where they landed, they must be less than the width of the bucket (1 / K) apart:

The inevitability of a pair of elements with spacing of less than 1 / K is the crux of the proof. The rest is just a bit of manipulation to relate these elements to a rational approximation of the starting number r.

We show this in a couple of steps. First, as a consequence of how we constructed these fractional parts, we can rewrite any x_k as the difference between the k-th multiple of r and the associated integer part v_k. After making these substitutions for indices h and g, we get:

Next, we group the r-coupled and r-free terms, obtaining what appears to be two independent integers: (v_h - v_g) and (h - g). We label these a and b:

We don’t need to dwell on the possible values of a; it’s enough that the number can exist. We’re also not concerned about the exact value of b, although we ought to note that it’s always positive (because we specified g < h) and that it’s necessarily less than or equal to K (because it represents the difference of indices in a list with K + 1 elements).

We’ll lean on these properties soon, but for now, let’s bake a and b into the earlier inequality to obtain:

Remember the flag for later and divide both sides by b to obtain:

Huh — the left-hand portion of the expression is the same as the earlier formula for calculating the error (ε) for an approximation of r with a rational fraction a / b. In other words, the inequality seems to be saying that, as a consequence of the pigeonhole principle, we can pick any r and any K > 0, and there’s always some integer a / b that approximates r with an error of less than 1 / (K · b).

We haven’t picked any specific K, but we know that b is always less or equal than K; again, this is because we defined b as a substitution for h - g, the delta between two indices in a sequence of K + 1 elements. Therefore, the expression in the denominator — K · b — involves multiplying b by a value that’s equal or greater than b. In effect, we have proof that for any real r, some a / b satisfies ε < 1/b².

This proof is known as Dirichlet’s approximation theorem. At first blush, it only guarantees a single 2-good approximation for every real. Worse yet, the solution guaranteed by the proof might not comply with the rules of our game, because nothing stops it from producing exact approximations (ε = 0). So, what did we achieve?

Well, that’s where we come back to an intermediate equation marked with ⚑:

In the earlier course of the proof, we divided the left-hand side of this inequality by b to arrive at the formula identical to ε. Equivalently, we can say that the current form is equal to ε · b. We already have a name for this parameter: this is the normalized approximation error s, as introduced early in the article.

We can also assert that for any irrational r, the left-hand side of that inequality must be greater than zero. To prove this property, it’s sufficient to show that we’d end up with a contradiction if multiplying r by some positive integer (b) produced some sort of a rational number — that is, if it netted an ad hoc fraction h / j, where h and j are also integers. If r · b = h / j, we can represent r itself as a fraction, making it rational:

In other words, if r is irrational, the same must hold for r · b. Since r · b is an irrational number and not an integer, subtracting an integer from it will always leave a fractional part. Therefore, s = | r · b - a | must be > 0.

To take the next step — and we’re close to the finish line! — note that Dirichlet’s proof doesn’t put any constraint on the upper value on the number of buckets (K). If we choose some specific K₁, the earlier proof establishes the existence of a single 2-good pair, which we can label a₁ and b₁. If we choose another value K₂, the proof establishes the existence of a potentially different pair we’ll call a₂ and b₂. That said, who knows if the pairs actually differ? Maybe there’s just a single solution that repeats for every K?…

Let’s assume that’s the case; if the resulting approximations are identical, the same goes for the normalized approximation error: s = s₁ = s₂. To restate this more explicitly, we’re entertaining the possibility that this single value satisfies the flagged inequality in both proofs: s < 1 / K₁ and s < 1 / K₂.

At the same time, we have noted that in the irrational case, s must be positive. Real numbers can be arbitrarily small, but they can’t be infinitely small, so for any positive s that obeys the first inequality, we can make the 1 / K₂ fraction in the second proof smaller than s simply by choosing a sufficiently large K₂. This breaks the second inequality and leads to a contradiction. We must conclude that, for some K₂ > K₁, we necessarily get a new, better approximation (s₂ < s₁).

Further, if we keep incrementing K, this new a₂ / b₂ approximation will eventually succumb to the same fate. We can evidently get as many 2-good pairs as we want. The proof doesn’t guarantee that it’s going to happen on any specific cadence, but it says that the outcome is inevitable.

As a postscript, we ought to ask if the same reasoning applies to rationals; if it does, that would contradict our earlier argument that rational numbers can only have a handful of 2-good solutions. To show that there is no contradiction, note that in the rational case, s can conceivably reach zero (i.e., there is some a / b value that is an exact approximation). The rules of our game reject these approximations, but as discussed earlier, the same constraint is not baked into Dirichlet’s proof.

Next, let’s rewrite our rational r as p / q in the left-hand portion of the earlier inequality:

The numerator of the fraction on the right is an integer (because so are a, b, p, and q). The denominator is also an integer that stays constant for a given r. It follows that when approximating rationals, there is a fixed, minimum decrement for s: 1/q. We might start from a non-zero s₁, but if we keep ramping up K, the system must reach the degenerate s_n = 0 case after producing a finite number of inexact approximations. From that point on, s < 1 / K is satisfied for any K and the proof no longer necessitates the generation of additional 2-good pairs.

As before, we can’t cheat by increasing p in tandem with q (e.g., r = 1/2 to r = 4/8). This trick increments the nominator and the denominator by the same factor, still producing the same effective step; the solution is predicated on the lowest-terms representation of r = p / q.

In the end, you get an infinite supply of surprisingly accurate solutions for irrational numbers, but a limited (often very limited) number of decent results for rationals.

But… why?

Right. The proofs are interesting but don’t offer an intuitive explanation of why these patterns emerge. This is where we go back to my opening remark: it’s easier to grasp the outcome if you look at how rational numbers and reals are “made”.

From the construction of rationals, we know that the spacing between them is arbitrarily close, but at any “magnification level” — for any chosen denominator b — the values divide the continuum into uniform intervals. Uniform spacing also implies maximal spacing: even though there is no upper or lower bound to the values of a / b, they are as far apart as they can be. Any new value inserted onto the number line will necessarily sit “closer” to an existing rational.

The gaps between rational numbers is where we find irrationals. This comes with a lot of weird baggage explored in the previous article, but it also means that for any given irrational r, we have an inexhaustible supply of unexpectedly accurate rational approximations in the vicinity.

Although the puzzle we started with might seem silly, the study of these structures — known as Diophantine approximations — is taken seriously and gets complicated fast. For example, it’s possible to construct so-called Liouville numbers that have an infinite irrationality exponent (endless n-good approximations for any n), but it’s a lot harder to prove that any commonly-encountered number has an irrationality exponent greater than two. In the same vein, algebraic irrationals (e.g., √2) all have an irrationality measure of two, but the proof of this is fiendishly difficult and netted its discoverer the Fields Medal back in 1958.

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Later, we leaned on set theory to encode the underlying structure of these symbols. This netted us a hierarchy of set-theoretic natural numbers known as ordinals. It also led to an interesting insight: if we allowed the existence of infinite sets, then the set of all natural numbers (ℕ) itself had the structure of an ordinal. In the article, we labeled this infinite number ω and demonstrated that it could be manipulated using the same arithmetic rules as finite numbers, but that it sometimes behaved in wacky ways. For example, we established that ω + 1 ≠ 1 + ω.

We also touched on various methods of reasoning about the magnitude of ordinals and showed that these approaches diverge from each other in the realm of infinities. In particular, we talked about Georg Cantor’s notion of cardinality, which put many distinct infinite ordinals in the same size class, but indicated that there’s a fundamental difference in scale between the set of natural numbers and the set of reals (ℝ).

If you haven’t read the article but are intrigued, I strongly encourage you to give it a go (link). I think it’s an excellent and accessible introduction. If you’re up to speed, there might be one thing that’s bugging you: we carefully defined natural numbers from first principles, but then pulled reals out of a hat. This is a gap worth addressing, because as it turns out, real numbers are profoundly weird.

Natural numbers (ℕ)

As a reminder, in the earlier article, we constructed a succession of labels that corresponded to subsequent natural numbers by conjuring an object representing zero and then successively applying function S(…) to it:

The “:=” operator means “is defined as”. Elsewhere, you might see this written as ≝, ≜, or a regular =.

In Peano arithmetic, the label “0” and the successor function S(…) have no deeper meaning: they are just “things” with a couple of common-sense properties spelled out. All the notation indicates is that every subsequent label has some fixed relationship to the one that came before. In the set-theoretic approach we switched to later, we defined these concepts with more precision, but this detail doesn’t matter now.

The important point is that in both models, the successor relationship allowed us to define the behavior of the “+” operator using a pair of simple substitution rules:

Although the rules may seem cryptic, they effectively just codify that adding zero is a no-op and that a + (b + 1) is the same as as (a + b) + 1. This simple ruleset is enough to solve problems such as 2 + 2 without any assumptions about the fundamental meaning of “2” or “+”.

To illustrate, from the definition of Peano numbers, note that “2” is the same as S(1), so 2 + 2 can be restated as 2 + S(1). Switching to that form allows us to apply rule #2, in turn rewriting 2 + S(1) as S(2 + 1):

After that, we can apply the same steps again to expand the nested 2 + 1 sum:

We now have a doubly-nested sum involving zero, so we can apply rule #1, getting rid of the sum (2 + 0 = 2) and “unwinding” the successor functions to arrive at the result:

Again, if you’re interested in a more detailed walkthrough, including C code that explains the process in programmer-friendly terms, check out the article linked earlier on.

What we haven’t covered in that article is that we can use a similar approach to recursively define multiplication for naturals:

In effect, without having to explicitly define subtraction for the set-theoretic members of ℕ, we’re saying that a · b can be rewritten as a · (b-1) + a. This process can be continued until we get to a · 0; at that point, the multiplication part works out to zero, so we just unwind the stack and gather all the “+ a” terms. For example, here’s the process to calculate 5 · 3:

This will come in handy in a while.

Integers (ℤ)

A major hurdle on our path toward a complete system of arithmetic is that natural numbers can’t represent negative values. This means that if we attempt to define subtraction, many results will not have an in-system representation, throwing a wrench in the works.

To extend ℕ to negative numbers, we could futz around with a way to encode the minus sign and then special-case it in the arithmetic rulesets. That said, a more “regular” approach is to define integers as a separate hierarchy of numbers, each integer z consisting of an ordered pair of naturals: z = (a, b). The first element of the pair represents the positive component while the second represents the negative part. Thus, integer +5 can be encoded as (5, 0) while integer -5 becomes (0, 5).

You might be wondering if we just pulled the concept of an “ordered pair” out of thin air. Yes and no: it’s new here, but in set theory, these pairs are mapped to normal sets, except we design the mapping so that (a, b) differs from (b, a). This can be done in a number of ways, but a common approach devised by Kazimierz Kuratowski is:

In essence, the pair is represented by a two-element set, but the second element also embeds a copy of the first, so the result is different depending on the order of the elements in the pair. This encoding has a couple of nice properties, but they’re not important to what we’re about to do.

To define the addition of pair-based integers, we can simply add the “positive” and “negative” halves separately. Since the underlying elements are natural numbers, we already know how to sum them, and we can write:

In the same vein, because each integer effectively expresses the difference between two underlying numbers, the result of multiplying two integers (a, b) and (c, d) will follow the school-taught pattern of (a - b) · (c - d) = ac - ad - bc + bd. We split out the positive and negative parts of the solution and write:

These rules sort of work. For example, adding integer +5 and -5 nets us:

The result (5, 5) seems to be saying “zero”, but it’s different from other zero-like results, such as (1, 1) or (0, 0). To make the system usable, we need to codify that pairs (a, b) and (c, d) represent the same integer if a - b = c - d.

We haven’t defined the subtraction operator for set-theoretic naturals that make up the integer pairs, but we can shuffle the terms of the “sameness” criterion to express the same principle in terms of addition, which we know how to do:

With this pair equivalence relationship defined, we assign integer labels such as “+5” not to a specific pair, but to an entire equivalence class: a collection of ordered pairs that satisfy the above criteria. In this model, our new hierarchy of numbers looks the following way:

We’re mostly done with integers, but before we wrap up, let’s ponder if the set of integers is “larger” than the set of natural numbers. By some metrics, you could argue it is. That said, using the method outlined in the earlier article, there’s at least one way to map every integer to a natural number without the risk of running out of naturals:

This works because every element in these sets is finite but there is no upper bound; for any finite +n, the number 2n is also finite and has a place in ℕ. The existence of a one-to-one mapping implies that the sets have the same cardinality.

Rationals (ℚ)

Rational numbers are values that can be expressed as a ratio of two integers: a / b. In the previous section, we defined each integer as an ordered pair of naturals that effectively encodes subtraction. So, here’s the neat part: nothing stops us from taking two integers and fashioning them into another, higher-level pair that encodes division. From these integer pairs, we obtain a hierarchy of rational numbers: q = (a, b).

In this model, we consider rationals (a, b) and (c, d) to be equivalent if the underlying integers satisfy the criterion a / b = c / d (for a non-zero b and d). Once again, we don’t have the division operator defined for the underlying integer values, but we know how to multiply them, so we can restate the rule the following way:

This nets us the following taxonomy:

The multiplication rule for two pairs representing rational numbers can be defined as a trivial restatement of a/b · c/d = ac/(bd):

The addition of rationals is formalized in an equally straightforward way, following the normal a/b + c/d = (ad + cb) / (bd) pattern:

What’s the “size” of the set of all rational numbers? Well, again, depends on how we look at it, but we can show that the cardinality of is not greater than ℕ. One visual approach is to construct a two-dimensional array of fractions in the form of x/y:

It should be evident that because x and y coordinates separately move through every possible natural number, the array contains all positive rational fractions. Some of the tiles are redundant (e.g., 2 is the same as 4/2), but this is not important for the proof.

With the rationals laid out, we can traverse this grid in a way that lets us assign every tile to an integer without leaving any gaps and without ever running out of members of ℕ. The start of one such traversal pattern is indicated by arrows in the figure. We begin in the top left corner (1), move one tile to the right (½), take a sharp turn to the right and start moving diagonally until we hit the vertical edge (2), move one tile down (3), then follow a diagonal pattern back (toward ⅓). Rinse, repeat. By analogy to what we’ve done for integers, the result doesn’t change if we toss negative rationals into the mix.

Computable numbers

Not every number can be expressed as a ratio of two integers. The two examples of irrational numbers that every reader should be familiar with are √2, which can be expressed in polynomial terms, and π, which cannot.

Although these numbers can’t be represented as rationals, they can be explained in terms of an algorithm you need to follow to approximate them to an arbitrary degree. For example, the sum of the following terms starting at n = 0 will slowly but surely converge to π as the count of summed elements grows:

Within the bounds of the precision of floating-point numbers, you can observe the behavior by running the following C code (demo link):

#include <stdio.h>
#include <stdint.h>

int main() {
  double sum = 0;
  for (uint64_t n = 0, pos = 0; n <= 65536; n++) {
    sum += 8.0 / ((4*n + 1) * (4*n + 3));
    if (n >> pos) { printf("[%5ld] %.05f\n", n, sum); pos++; }
  }
}

At first blush, it would appear that any well-specified irrational number of our choice can be expressed as an approximation algorithm. This leads to a concept that should appeal to any geek: computable numbers. It’s the set of all numbers that can be approximated to an arbitrary precision in finite time by a theoretical model of a computer known as a Turing machine. In effect, the number is the algorithm.

Interestingly, the cardinality of the set of computable numbers is still the same as the cardinality of ℕ. An intuitive explanation is that there are only as many computable numbers as there are Turing machines that could generate them. The ruleset of every Turing machine can be encoded as a finite natural number — you could just write it down and then convert the spec to ASCII values — so we’re still in the realm of countable infinities.

Reals (ℝ)

Of course, we don’t teach about computable numbers in school. Instead, the most common “upgrade” from ℚ are reals: an idealized continuum on which, to put it in a hand-wavy way, every number exists whether we know how to algorithmically approximate it or not.

Of course, my phrasing here is severely deficient. It’s not a free-for-all: 🥔 (a potato) is not a real number, and to avoid a variety of complications, neither is √-1. The set ℝ extends ℚ, but it does so only in the immediate vicinity of rationals. Pick any real and I can find a rational fraction that’s arbitrarily close.

To describe the underlying structure of real numbers in more precise terms, we can turn to Dedekind cuts. Informally, the idea is that we can unambiguously identify each real number by associating it with the set of all rationals that come before it. More specifically, to describe real number x, we could take the set of rational numbers and partition it into an ordered pair of sets (A, B), such that set A contains every rational q < x and set B contains every q ≥ x.

This description may seem circular: to build the representation of a real number x, we need to know where to make the cut, which seem to require some prior knowledge about how x relates to ℚ. That said, the point isn’t that our method lets us hone in on the exact location of π; it’s that the universe of real numbers is built by taking every possible Dedekind cut of ℚ. Some of these cuts coincide with rational numbers and some fill the gaps in between. In all cases, the numbers are the cuts, and π is somewhere out there — even if we can’t point to a specific rational number immediately precedes or follows it.

Of course, many irrational partitions can be described unambiguously even if the location of the cut in ℚ is unclear. For example, to characterize the cut for ∛5, we can just say that set A consists of every rational q such that q³ < 5 and set B contains every q such that q³ ≥ 5. That said, once more, the existence of a real number doesn’t hinge on the ability to pinpoint its “insertion point” between two specific rationals.

Once we have numbers expressed in terms of Dedekind cuts, we can define arithmetic operations on reals in a pretty straightforward way. For example, to add set-theoretic real (A, B) to (C, D), we construct a new number (E, F) such that for every possible rational a selected from A and every rational c selected from C, the sum a + c is placed in E. In the same vein, for every b in B and d in D, the sum b + d goes into F.

I’ll spare you the abstract set notation, but as a practical example, if (A, B) represents 2 and (C, D) represents 3, we know that every a selected from A will be less than 2 and every c chosen from C will be less than 3. Therefore, every a + c value placed in E will be less than 5. Similarly, every b + d that goes into F will be greater or equal than 5. The resulting pair (E, F) is therefore the same as the cut representing the number 5.

We now have a continuum that contains numbers that are allowed to exist regardless of whether they can be described by an effective, finite procedure. As an unexpected consequence, the cardinality of ℝ is higher than ℕ.

We explored this property in the earlier article, but to briefly recap the argument, assume the existence of some 1-to-1 mapping between integers and all possible infinite decimal sequences representing reals between 0 and 1. The specifics of the mapping don’t concern us; we’re just asserting that it exists:

For every entry in the mapping, I underlined a successive decimal position on the real side. Equipped with this information, we can imagine a new infinite decimal built by looking at each of the underlined digits and then placing a different digit in the corresponding position of the newly-constructed value.

By construction, our new number necessarily differs by at least one digit from every assigned real. The presence of a member of ℝ that isn’t assigned to an integer is a contradiction that tells us that the postulated 1-to-1 mapping can’t exist, even just for the interval of (0, 1). There is a fundamentally higher “number” of reals than naturals — an uncountable infinity.

So what?

Well… from the earlier discussion, recall that the cardinality of computable numbers was the same as the cardinality of ℕ. The cardinality of ℝ — the “magnitude” of the set of reals — is fundamentally greater than that. In other words, we can assert that most reals are uncomputable.

But what would be an example of an uncomputable real? That’s a good question! One possibility is any number that encodes the solution to the halting problem. It would lead to a paradox to have a computer program that allows us to decide, in the general case, whether some other computer program halts. So, if a procedure to approximate a particular real requires solving the halting problem, we can’t have that.

If you’re interested in a more thorough exploration of that particular idea, check out my earlier article on busy beavers and the limits of algorithmic knowledge. But to cut to the chase, there are people who believe that the universe is functionally a computer — that is, that its rules are deterministic and can be simulated by a Turing machine. If so, that would imply that uncomputable numbers can’t be zeroed in on by any finite-time physical process, including human thought. They would be truly out of reach… and again, this would apply to almost every member of ℝ.

Cue the Twilight Zone theme music — and see you in a bit.

Further reading in the series:

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But then, it’s not wrong to scratch your head. Blurring amounts to averaging the underlying pixel values. If you average two numbers, there’s no way of knowing if you’ve started with 1 + 5 or 3 + 3. In both cases, the arithmetic mean is the same and the original information appears to be lost. So, is the advice wrong?

Well, yes and no! There are ways to achieve non-reversible blurring using deterministic algorithms. That said, in some cases, blur filters can preserve far more information than would appear to the naked eye — and do so in a pretty unexpected way. In today’s article, we’ll build a rudimentary blur algorithm and then pick it apart.

One-dimensional moving average

If blurring is the same as averaging, then the simplest algorithm we can choose is a single-axis moving mean. In photo editing software, this filter is commonly called motion blur and is fairly similar to the artifacts produced by rapid object movement or camera shake.

To implement the effect, we take a fixed-size window and replace each pixel value with the arithmetic mean of n pixels in its neighborhood. For n = 5, the process is shown below:

Note that for the first two cells, we don’t have enough pixels in the input buffer. We can use fixed padding, “borrow” some available pixels from outside the selection area, or simply average fewer values near the boundary. Either way, the analysis doesn’t change much: the presence of this boundary, along with the discrete stepover of the averaging window, leaks information about the underlying image.

To illustrate, let’s assume that we’ve completed the blurring process and no longer have the original pixel values. To reconstruct the data, we start at the left boundary (x = 0). Recall that we calculated the first blurred pixel like by averaging the following pixels in the original image:

Next, let’s have a look at the blurred pixel at x = 1. Its value is the average of:

We can easily turn these averages into sums by multiplying both sides by the number of averaged elements (5):

Note that the underlined terms repeat in both expressions; this means that if we subtract the expressions from each other, we end up with just:

The value of img(-2) is known to us: it’s one of the fixed padding pixels used by the algorithm. Let’s shorten it to c. We also know the values of blur(0) and blur(1): these are the blurred pixels that can be found in the output image. This means that we can rearrange the equation to recover the original input pixel corresponding to img(3):

We can also apply the same reasoning to the next pixel:

At this point, we seemingly hit a wall with our five-pixel average, but the knowledge of img(3) allows us to repeat the same analysis for the blur(5) / blur(6) pair a bit further down the line:

This nets us another original pixel value, img(8). From the earlier step, we also know the value of img(4), so we can find img(9) in a similar way. This process can continue to successively reconstruct additional pixels, although we end up with some gaps. For example, following the calculations outlined above, we still don’t know the value of img(0) or img(1).

These gaps can be resolved with a second pass that moves in the opposite direction in the image buffer. That said, instead of going down that path, we can also make the math a bit more tidy with a harmless, good-faith tweak to the averaging algorithm in a way that doesn’t change the nature of the effect.

Right-aligned moving average

The modification that will make our life easier is to shift the averaging window so that one of its ends is aligned with where the computed value will be stored:

In this model, the first output value is an average of four fixed padding pixels (c) and one original image pixel; it follows that in the n = 5 scenario, the underlying pixel value can be computed as:

If we know img(0), we now have all but one of the values that make up blur(1), so we can find img(1):

The process can be continued iteratively, reconstructing the entire image — this time, without any discontinuities and without the need for a second pass.

In the illustration below, the left panel shows a detail of The Birth of Venus by Sandro Botticelli; the right panel is the same image ran through the right-aligned moving average blur algorithm with a 151-pixel averaging window that moves only in the x direction:

Now, let’s take the blurry image and attempt the reconstruction method outlined above — computer, ENHANCE!

This is rather impressive. The image is noisier than before as a consequence of 8-bit quantization of the averaged values in the intermediate blurred image. Nevertheless, even with a large averaging window, fine detail — including individual strands of hair — could be recovered and is easy to discern.

Into the second dimension

One obvious problem with our blur algorithm is that it averages pixel values only in the x axis; as mentioned earlier, this roughly approximates motion blur or camera shake.

The approach we’ve developed can be trivially turned into a 2D filter by using a two-dimensional averaging window; if we use a square region, this is called box blur. That said, a more expedient and functionally similar hack is to apply the existing 1D filter in the x axis and then follow with a complementary pass in the y axis. To undo the blur, we’d then perform two recovery passes in the inverse order.

Unfortunately, whichever route we take, we’ll discover that the combined amount of averaging per pixel causes the underlying values to be quantized so severely that the reconstructed image is overwhelmed by noise unless the blur window is relatively small. For the 1D + 1D method, we get:

That said, if we wanted to develop an adversarial box blur filter, we could fix the problem by weighting the original pixel a bit more heavily in the calculated mean. For the x-then-y variant, if the averaging window has a size W and the current-pixel bias factor is B, we can write the following formula:

This filter still does what it’s supposed to do; here’s the output of an x-then-y blur for W = 200 and B = 30:

Surely, there’s no coming back from tha— COMPUTER, ENHANCE!

Remarkably, the information “hidden” in the blurred images survives being saved in a lossy image format. The top row shows images reconstituted from an intermediate image saved as a JPEG at 95%, 85%, and 75% quality settings:

The bottom row shows less reasonable quality settings of 50% and below; at that point, the reconstructed image begins to resemble abstract art.

Do I need to worry?

Maybe? As noted earlier, even in the case of simple box blur, the recovery is less successful for large, two-dimensional blur windows, unless we tip the scales in our favor by tinkering with the algorithm.

The likelihood of success will be also reduced if you use a more sophisticated blur filter. Virtually all practical implementations of blur algorithms work in a similar way, so they leak some information due to presence of blur region boundaries and the discrete stepover of a finite averaging window. That said, they use different weighting for pixel values, which complicates the math and can make recovery borderline impossible.

On the flip side, for constrained data such as text, pixel-level reconstruction may be unnecessary to begin with. Instead, regions of the blurred image can be successively compared to the blurred representations of every possible symbol. In this scenario, it doesn’t help that the transformation is technically irreversible. It suffices that there’s a finite alphabet of shapes and that they produce distinct output images.

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What might be harder to grasp is what these images mean or how they’re generated. You can find a handful of tesseract rendering demos on GitHub, but they all take different approaches, produce different results, and don’t really explain what’s going on.

In this article, we’ll take a look at the hypercube from first principles — and then, figure out how to map this beast to a computer screen.

It’s hip to be square

To build a mathematical model of the hypercube, let’s start with a square. If we get it right, our approach will generalize to three dimensions and produce a cube; if it does, it ought to extend to the hyperspace too.

More specifically, we’ll try to model the edges of a square — i.e., the line segments that connect the vertices in the four corners. For our purposes, a see-through wireframe model will work better than a solid.

For a 2D square with dimensions 2a×2a, the horizontal edges can be described as a collection of points that satisfy two criteria:

In essence, we’re saying that we want to include points for which the y coordinate is equal to either -a (the lower edge) or +a (the upper edge); and where the x coordinate spans anywhere between -a and +a:

To construct the remaining vertical edges, we can just flip the criteria around, constraining x to one of two values and allowing y to span a range. This nets us the following combined formula:

The method is easy to generalize to a cube. We start by constructing a rectangle in the x-y plane using the earlier approach, except we add a third modulo constraint so that we end up with two images at the -a and +a offsets in the z axis:

What’s still missing are four edges oriented in the z direction that connect the corresponding corners of the two squares. We can add this with a third rule:

Note that each of these rules produces four line segments because there 2² possible combinations for the coordinates constrained by the equality relationship. For example, for horizontal lines, we can have the following pairs of y and z values: (-a, -a), (-a, +a), (+a, -a), and (+a, +a).

From here, the extension to the fourth dimension should be clear. I’m going to sensibly label the dimension 🌀; with this done, we just add a fourth constraint to each of the existing 3D rules and then add connecting segments in the fourth dimension:

This time around, each rule nets us 2³ = 8 line segments, so the tesseract has 4·8 = 32 edges. These edges connect 16 vertices.

Defining rotations

Most visualization of the tesseract spin the figure around. This allows the shape to be examined from different angles and makes for some mind-bending visuals. But what does it mean to rotate an object in 4D?

In a two-dimensional space, there’s only one type of rotation; it transposes coordinates in the XY plane. The following demonstrates the effect of rotating a point originally placed on the x axis around the center of the coordinate system:

From basic trigonometry, the new x coordinate of the rotated point is the adjacent of a right triangle with an angle α and a hypotenuse of x_orig. The new y is the opposite of that same triangle. If we want to start with a non-zero y coordinate for the point, we need add a small tweak:

In three dimensions, we have a lot more freedom. We can obviously spin things around in the XY plane (around the z axis), XZ (around y), or in YZ (around x). It is also possible to dream up more complex rotations that touch all three coordinates at once, but they don’t add much value. They can be deconstructed into a sequence of planar rotations in XY, XZ, and YZ.

Given this observation, in four dimensions, we should probably still stick to the primitive of planar rotations that modify just two axes at a time. The only difference is that we get additional X🌀, Y🌀, and Z🌀 planes to use.

For ease of viewing and for consistency with 3D models, we’ll focus on spinning things in the XZ plane — a “turntable” animation:

That said, we’ll also pay a brief visit the Z🌀 rotation plane. It plays by similar rules:

Projecting 4D to 2D

Our next challenge is figuring out how to project four-dimensional coordinates onto a two-dimensional drawing surface, such as a computer screen.

In standard geometries, Cartesian axes are orthogonal to each other — that is, there is a 90° rotation that can take you between any two dimensions. On a two-dimensional surface, we can only pull this off with two axes; that said, there are several imperfect ways to make do.

Cavalier projection

If we were to ask a random person to come up with a 3D-to-2D projection on the spot, they would probably suggest drawing the z axis as a diagonal line on a 2D plane, as shown below:

To convert the model-space z value to screen coordinates, we can use trigonometry to project the component onto the real x and y axes:

Alas, if you attempt this projection with a regular three-dimensional cube, you will immediately notice that it looks off:

The viewer-facing edges in the XY plane are exactly the same length as the z edge; nevertheless, it’s hard to shake the impression that the dimensions are off and the cube is stretched.

Cabinet projection

To address this issue, we need to shorten the projected z-axis edges, crudely approximating the length contraction that we expect in real life. To do this, we divide the z component by an ad hoc scaling factor, typically 2:

The cabinet projection is ubiquitous in informal sketches and technical drawings, and it does look good at first blush. That said, consider the following video of a cube that is rotated in the XZ plane:

Note that the shape looks OK at first, but then gets weirdly squished near the rotation angle of 70°; this is because the projection gives us incorrect visual cues that the shape is facing us — the back edges appear to be tucked squarely behind the front — while in reality, the shape is still at an angle in relation to the viewer.

The root of the problem is that the axes are not oriented in a way that would be possible in real life. If we constructed a model of 3D axes out of sticks, the only way for the z axis to appear at a 45° angle — or indeed, to be visible at all — is if at least one of the other axes is not parallel to the camera plane:

Isometric projection

This brings us to the isometric projection — a physically-plausible arrangement that places the model axes 60° apart:

The math for this projection is still simple. The screen x coordinate is dictated by model x multiplied by cos(30°) — that’s the angle between the model x axis and the real one. The value is also influenced in the same way but with an opposite sign by the model z axis, so we get:

Meanwhile, on the y side, we need to account for the projected sine component of x and z:

Both trigonometric expressions can be further divided by √2 if the goal is to match the model- and screen-lengths of a horizontal line drawn in the model XY plane and then rotated by 45° around the y axis. That said, it’s seldom a necessity.

The following video shows a cube rotated in the XZ plane in an isometric projection:

This looks great and it seems natural to extend the scheme to four dimensions simply by cramming another axis, giving us a progression of x, y, z, and 🌀 axes spaced 45° apart:

Yet, some readers might notice that with this modification, we’re back to the earlier “cavalier” scenario: our x, y, and z axes are now separated by an impossible angle of 45°. In other words, the projection should give us something, but it will distort some 3D shapes in undesirable ways.

Still, let’s keep going. In the new model, we calculate screen x as:

The projected model y axis is orthogonal to to screen x, so it doesn’t appear in this formula. As for the y coordinate, we need:

As before, since the projected model 🌀 axis is orthogonal to screen y, it doesn’t appear in the second equation.

Let’s put this projection to real use. Here’s the video of a tesseract rotating in the XZ plane:

It looks pretty, but it isn’t particularly informative: the projection makes the object change shape in ways that seem difficult to parse. The shape appears to be intersecting itself, but it’s hard to pinpoint what’s what.

Rectilinear one-point perspective

A simpler but surprisingly powerful projection method is to keep model x and y in the same plane as the screen, but divide the values of these coordinates in proportion to the distance in z. This produces a familiar vanishing-point perspective:

A fairly natural extension of this technique to the fourth dimension is to divide the x and y coordinates twice: first by a z-dependent factor and then by a 🌀-dependent one. This nets probably the most recognizable visualization of a tesseract:

If you want food for thought, consider the real-world appearance of a wireframe 3D cube when its shadow from a nearby overhead light is cast onto a 2D surface:

This both helps make some sense of the nested-cube visualization of the tesseract, and signals that our algorithm is directionally correct. That said, the approach we’ve taken is also a bit of a cop-out: by commingling model z and 🌀, we make these dimensions indistinguishable.

Fisheye perspective

At first blush, the tesseract visualization might look just like two nested 3D cubes connected in the corners. To reduce edge overlaps and better hint at the underlying shenanigans, we can switch to a curvilinear “fisheye” perspective, reminiscent of what you can see through a peephole or other low-quality, wide-angle lens. In this approach, point coordinates are reduced based on their Euclidean distance from a single reference point representing the camera. For a regular cube, we get:

But of course, we’re here to look at the tesseract:

The shading and the drawing order of the points is decided by the Euclidean distance to the viewing plane; this allows us to spot that the edges of the smaller, “inner” cube appear to pass behind the edges of the larger one:

Still, as noted earlier, the disappointing part of the mapping is that it commingles two dimensions; can we distinguish them better without ending up with a visual disaster?

Mixed isometric + vanishing point

Sort of?… Instead of trying to come up with a single projection for all four axes, we could always use a conventional isometric view for x, y, and z, and then use the vanishing-point approach to represent 🌀.

The result is a remarkably stable and easy-to-parse view of the tesseract when rotated in the YZ plane:

This also brings us to a somewhat less-correct rendering of the hypercube spinning in the Z🌀 plane that can be found on Wikipedia and in some YouTube videos. If we change screen depth calculations to only account for the z coordinate (i.e., completely ignore model 🌀), we obtain the following:

If you squint your eyes, this appears to show the tesseract passing through itself back-to-front as it rotates in the fourth dimension. I altered the proportions of the projection to make the effect easier to see.

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That said, by far the most consistent challenge is art. Illustrations are important, easy to half-ass, and fiendishly difficult to get right. I’m fortunate enough that photography has been my lifelong hobby, so I have little difficulty capturing good photos of the physical items I want to talk about:

Similarly, because I’ve been interested in CAD and CAM for nearly two decades, I know how to draw shapes in 3D and know enough about rendering tech to make the result look good:

Alas, both approaches have their limits. Photography just doesn’t work for conceptual diagrams; 3D could, but it’s slow and makes little sense for two-dimensional diagrams, such as circuit schematics of most function plots.

Over the past three years, this forced me to step outside my comfort zone and develop a new toolkit for simple, technical visualizations. If you’re a long-time subscriber, you might have seen the changing art style of the posts. What you probably don’t know is that I often revise older articles to try out new visualizations and hone in my skills. So, let’s talk shop!

Circuit schematics

Electronic circuits are a common theme of my posts; the lifeblood of this trade are circuit schematics. I’m old enough to remember the beautiful look of hand-drawn schematics in the era before the advent of electronic design automation (EDA) software:

Unfortunately, the industry no longer takes pride in this craft; the output from modern schematic capture tools, such as KiCad, is uniformly hideous:

I used this style for some of the electronics-related articles I published in the 2010s, but for this Substack, I wanted to do better. This meant ditching EDA for general-purpose drawing software. At first, I experimented with the same CAD software I use for 3D part design, Rhino3D:

This approach had several advantages. First, I was already familiar with the software. Second, CAD tools are tailored for technical drawings: it’s a breeze to precisely align shapes, parametrically transform and duplicate objects, and so forth. At the same time, while the schematics looked more readable, they were nothing to write home about.

In a quest for software that would allow me to give the schematics a more organic look, I eventually came across Excalidraw. Excalidraw is an exceedingly simple, web-based vector drawing tool. It’s limited and clunky, but with time, I’ve gotten good at working around many of its flaws:

What I learned from these two tools is that consistency is key. There is a temptation to start every new diagram with a clean slate, but it’s almost always the wrong call. You need to develop a set of conventions you follow every time: scale, line thickness, font colors, a library of reusable design elements to copy-and-paste into new designs. This both makes the tool faster to use — rivaling any EDA package — and allows you to refine the style over time, discarding failed ideas and preserving the tricks that worked well.

This brings us to Affinity. Affinity is a “grown-up” image editing suite that supports bitmap and vector files; I’ve been using it for photo editing ever since Adobe moved to a predatory subscription model for Photoshop. It took me longer to figure out the vector features, in part because of the overwhelming feature set. This is where the lessons from Rhino3D and Excalidraw paid off: on the latest attempt, I knew not to get distracted and to focus on a simple, reusable workflow first.

This allowed me to finally get in the groove and replicate the hand-drawn vibe I’ve been after. The new style hasn’t been featured in any recent articles yet, but I’ve gone ahead and updated some older posts. For example, the earlier microphone amplifier circuit now looks the following way:

Explanatory illustrations

Electronic schematics are about the simplest case of technical illustrations. They’re just a map of connections between standard symbols, laid out according to simple rules. There’s no need to make use of depth, color, or motion.

Many other technical drawings aren’t as easy; the challenge isn’t putting lines on paper, it’s figuring out the most effective way to convey the information in the first place. You need to figure out which elements you want to draw the attention to, and how to provide visual hints of the dynamics you’re trying to illustrate.

I confess that I wasn’t putting much thought into it early on. For example, here’s the original 2024 illustration for an article on photodiodes:

It’s not unusable, but it’s also not good. It’s hard to read and doesn’t make a clear distinction between different materials (solid color) and an electrical region that forms at the junction (hatched overlay).

Here’s my more recent take:

Once again, the trick isn’t pulling off a single illustration like this; it’s building a standardized workflow that lets you crank out dozens of them. You need to converge on backgrounds, line styles, shading, typefaces, arrows, and so on. With this done, you can take an old and janky illustration, such as the following visual from an article on magnetism:

…and then turn it into the following:

As hinted earlier, in many 2D drawings, it’s a challenge to imply a specific three-dimensional order of objects or to suggest that some of them are in motion. Arrows and annotations don’t always cut it. After a fair amount of trial and error, I settled on subtle outlines, nonlinear shadows, and “afterimages”, as shown in this illustration of a simple rotary encoder:

The next time you see a blog illustration that doesn’t look like 💩 and wasn’t cranked out by AI, remember that more time might have gone into making that single picture than into writing all of the surrounding text.

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Let’s start with downsampling: what if we divide the data stream into buckets of n samples each, and then map the entire bucket to a single, averaged value?

for (pos = 0; pos < len; pos += win_size) {
    
  float sum = 0;
  for (int i = 0; i < win_size; i++) sum += buf[pos + i];
  for (int i = 0; i < win_size; i++) buf[pos + i] = sum / win_size;

}

For images, the result is aesthetically pleasing pixel art. But if we do the same audio… well, put your headphones on, you’re in for a treat:

The model for the images is our dog, Skye. The song fragment is a cover of “It Must Have Been Love” performed by Effie Passero.

If you’re familiar with audio formats, you might’ve expected this to sound different: a muffled but neutral rendition associated with low sample rates. Yet, the result of the “audio pixelation” filter is different: it adds unpleasant, metallic-sounding overtones. The culprit is the stairstep pattern in the resulting waveform:

Our eyes don’t mind the pattern on the computer screen, but the cochlea is a complex mechanical structure that doesn’t measure sound pressure levels per se; instead, it has clusters of different nerve cells sensitive to different sine-wave frequencies. Abrupt jumps in the waveform are perceived as wideband noise that wasn’t present in the original audio stream.

The problem is easy to solve: we can run the jagged waveform through a weighted rolling-average filter, the equivalent of blurring the pixelated image to remove the artifacts:

But this brings up another question: is the effect similar if we keep the original 44.1 kHz sample rate but reduce the bit depth of each sample in the file?

/* Assumes signed int16_t buffer, produces n + 1 levels for even n. */

for (int i = 0; i < len; i++) {

  int div = 32767 / (levels / 2);
  buf[i] = round(((float)buf[i]) / div) * div;

}

The answer is yes and no: because the frequency of the injected errors will be on average much higher, we get hiss instead of squeals:

Also note that the loss of fidelity is far more rapid for audio than for quantized images!

As for the hiss itself, it’s inherent to any attempt to play back quantized audio; it’s why digital-to-analog converters in your computer and audio gear typically need to incorporate some form of lowpass filtering. Your sound card has that, but we injected errors greater than what the circuitry was designed to mask.

But enough with image filters that ruin audio: we can also try some audio filters that ruin images! Let’s start by adding a slightly delayed and attenuated copy of the data stream to itself:

for (int i = shift; i < len; i++)
  buf[i] = (5 * buf[i] + 4 * buf[i - shift]) / 9;

Check it out:

For photos, small offsets result in an unappealing blur, while large offsets produce a weird “double exposure” look. For audio, the approach gives birth to a large and important family of filters. Small delays give the impression of a live performance in a small room; large delays sound like an echo in a large hall. Phase-shifted signals create effects such as “flanger” or “phaser”, a pitch-shifted echo sounds like a chorus, and so on.

So far, we’ve been working in the time domain, but we can also analyze data in the frequency domain; any finite signal can be deconstructed into a sum of sine waves with different amplitudes, phases, and frequency. The two most common conversion methods are the discrete Fourier transform and the discrete cosine transform, but there are more wacky options to choose from if you’re so inclined.

For images, the frequency-domain view is rarely used for editing because almost all changes tend to produce visual artifacts; the technique is used for compression, feature detection, and noise removal, but not much more; it can be used for sharpening or blurring images, but there are easier ways of doing it without Fourier.

For audio, the story is different. For example, the approach makes it fairly easy to build vocoders that modulate the output from other instruments to resemble human speech, or to develop systems such as Auto-Tune, which make out-of-tune singing sound passable.

In the earlier article, I shared a simple implementation of the fast Fourier transform (FFT) in C:

void __fft_int(complex* buf, complex* tmp, 
               const uint32_t len, const uint32_t step) {

  if (step >= len) return;
  __fft_int(tmp, buf, len, step * 2);
  __fft_int(tmp + step, buf + step, len, step * 2);

  for (uint32_t pos = 0; pos < len; pos += 2 * step) {
    complex t = cexp(-I * M_PI * pos / len) * tmp[pos + step];
    buf[pos / 2] = tmp[pos] + t;
    buf[(pos + len) / 2] = tmp[pos] - t;
  }

}

void in_place_fft(complex* buf, const uint32_t len) {
  complex tmp[len];
  memcpy(tmp, buf, sizeof(tmp));
  __fft_int(buf, tmp, len, 1);
} 

Unfortunately, the transform gives us decent output only if the input buffer contains nearly-steady signals; the more change there is in the analysis window, the more smeared and intelligible the frequency-domain image. This means we can’t just take the entire song, run it through the aforementioned C function, and expect useful results.

Instead, we need to chop up the track into small slices, typically somewhere around 20-100 ms. This is long enough for each slice to contain a reasonable number of samples, but short enough to more or less represent a momentary “steady state” of the underlying waveform.

If we run the FFT function on each of these windows separately, each output will tell us about the distribution frequencies in that time slice; we can also string these outputs together into a spectrogram, plotting how frequencies (vertical axis) change over time (horizontal axis):

Alas, the method isn’t conductive to audio editing: if we make separate frequency-domain changes to each window and then convert the data back to the time domain, there’s no guarantee that the tail end of the reconstituted waveform for window n will still line up perfectly with the front of the waveform for window n + 1. We’re likely to end up with clicks and other audible artifacts where the FFT windows meet.

A clever solution to the problem is to use the Hann function for windowing. In essence, we multiply the waveform in every time slice by the value of y = sin²(t), where t is scaled so that each window begins at t = 0 and ends at t = π. This yields a sinusoidal shape that has a value of zero near the edges of the buffer and peaks at 1 in the middle:

At first blush, it’s hard to see how this multiplication would help: the consequence of the operation is that the input waveform is attenuated by an cyclic sinusoidal pattern, and the attenuation pattern will carry over to any waveform reconstructed from the FFT data (bottom row).

The trick is to also calculate another sequence of “halfway” FFT windows of the same size that are shifted 50% in relation to the existing ones (second row below):

This leaves us with one output waveform (A in the bottom row) that’s attenuated by the repeating sin² pattern that starts at the beginning of the clip, and then another waveform (B) that’s attenuated by an identical sin² pattern shifted one-half of the cycle. The second pattern can be also written as cos².

With this in mind, we can write the equations for the two waveforms we can reconstruct from the FFT streams as:

If we sum these waveforms, we get:

This is where we wheel out the Pythagorean identity, an easily-derived rule that tells us that the following must hold for any x:

If you’re unfamiliar with this identity, recall that in a right triangle, sin(α) is the ratio of the opposite to the hypotenuse (a/c), while cos(α) is the ratio of the adjacent to the hypotenuse (b/c). If we choose c = 1, this simplifies to sin(α) = a and cos(α) = b. Further, from the Pythagorean theorem, a² + b² = c², so we can assert that sin²(α) + cos²(α) = 1 for any angle α.

In effect, the underlined multiplier in the earlier equation for the summed waveform is always 1; in the A + B sum, the Hann-induced attenuation cancels out.

At the same time, because the signal at the edges of each FFT window is attenuated to zero, we get rid of the waveform-merging discontinuities. Instead, the transitions between windows involve gradual shifts between A and B signals, masking any editing artifacts.

Where was I going with this? Ah, right! With this trick up of our sleeve, we can goof around in the frequency domain to — for example — selectively shift the pitch of the vocals in our clip:

Source code for the effect is available here. It’s short and easy to experiment with.

I also spent some time approximating the transform for the dog image. In the first instance, some low-frequency components are shifted to higher FFT bins, causing spurious additional edges to crop up and making Skye look jittery. In the second instance, the bins are moved in the other direction, producing a distinctive type of blur.

PS. Before I get hate mail from DSP folks, I should note that high-quality pitch shifting is usually done in a more complex way. For example, many systems actively track the dominant frequency of the vocal track and add correction for voiceless consonants such as “s”. If you want to down a massive rabbit hole, this text is a pretty accessible summary.

As for the 20 minutes spent reading this article, you’re not getting that back.

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In today’s episode, let’s have a look at a phase-locked loop clock multiplier: a circuit that, among other things, can take a 20 MHz timing signal produced by a quartz crystal and turn it into a perfectly-synchronized computer clock that’s running at 500 MHz, 3 GHz, or any other frequency of your choice.

A primer on latches

To understand the PLL frequency multiplier, it’s probably good to cover latches first. A latch is a fundamental data-storage circuit capable of holding a single bit. The simplest variant is the set-reset (S-R) latch, which can be constructed from basic logic gates in a couple of ways. Perhaps the most intuitive layout is the following three-gate approach:

To analyze the circuit, let’s assume that the “set” signal (S) is high and the “reset” signal (R) is low. In this case, the output of the OR gate is a logical one regardless of the looped-back signal present on the gate’s other terminal; this produces a logical one on the first input of the downstream AND gate. The other input of that AND gate is also equal to one, because it’s just an inverted copy of R = 0. All in all, in the S = 1 and R = 0 scenario, both inputs of the AND gate are high; therefore, so is the signal on the circuit’s output leg (Q).

Next, let’s imagine that S transitions to a logical zero. This puts one of the OR inputs at zero volts, but the other is still high because it’s the looped-back output signal Q. The circuit is latched: it keeps outputting the same voltage as before, even though the original driving signal is gone.

The only thing that can break the cycle if the “reset” line is pulled high. This causes one of the AND input to go low, thus forcing the output signal to zero and breaking the loop that kept the OR gate latched. From now on, the output remains low even if R returns to zero volts.

This two-lever latch can be fashioned into a more practical data (D) latch, which stores an arbitrary input bit supplied on the data line whenever the enable signal (E) is high, and keeps it when E is low:

In this circuit, a pair of input-side AND gates ensures that when E is at zero volts, the underlying S and R lines remain low regardless of the value presented on the data line. Conversely, if enable is high, the gates pass through a logical one either to the S line (if D is high) or the R line (if D is low).

Going further down that path, we can turn a D latch into a clocked D flip-flop, which stores a bit of data on the rising edge of the clock signal:

In this circuit, the latch on the left passes through the input data when the clock signal is low, or keeps the previous value if the clock is high. The latch on the right works the opposite way: it passes through the output from the first latch if the clock is high or holds the last value otherwise.

In effect, the value on the input line appears to propagate to the circuit’s output only during the 0 → 1 transition (rising edge) of the clock signal. More to the point, the propagation happens in two stages and there is never a direct signal path between D and Q, which prevents the cell from misbehaving if Q is looped back onto D.

Phase error detector

Once we have a clocked D flip-flop — and make a trivial modification to furnish it with an additional reset input — we can build a digital phase error detector circuit. One type of such a detector is shown below:

The purpose of the detector is to compare clock signal B to a reference clock provided on input A. If the positive edge on input A arrives before a positive edge on input B, the output of the upper flip-flop (Q_A) goes high before the output of the bottom flip-flop (Q_B); this signals that clock B is running too slow. Conversely, if the edge on B arrives before the edge on A, the circuit generates a complementary output indicating that B is running too fast. As soon as both flip-flops are latched high — i.e., after encountering a positive edge on whichever of the two clock signals is running slower — the circuit is reset.

The following plot shows the behavior of the circuit when the clock supplied on the B leg is running too slow (left) or too fast (right) in relation to the reference signal on leg A:

In effect, the detector generates longer pulses on the output labeled P if the analyzed clock signal is lagging behind the reference; and longer pulses on the other output (R) if the signal is rushing ahead.

It’s worth noting that the frequencies in the plot are not cherry-picked; although a rigorous mathematical analysis of phase detectors is fairly involved and they have transient failure modes, the following simulation shows that happens if the frequency B is changing continuously:

PLL loop

The detector can serve as the fundamental building block of a circuit known as a phase-locked loop. Despite the name, the main forte of phase-locked loops is that they can generate output frequencies that match an input signal of some sort, even if that signal is noisy or faint:

The output stage of the PLL is a voltage-controlled oscillator (VCO). We’ve briefly covered VCOs before: they generate an output waveform with a frequency proportional to the supplied input voltage.

The voltage for the VCO is selected by a simple switched capacitor section in the middle; the section has two digital inputs, marked “+” and “-”. Supplying a digital signal on the “+” input turns on a high-side transistor that gradually charges the output capacitor to a higher voltage, thus increasing the output frequency of the VCO. Supplying a signal on the “-” leg turns on a low-side transistor, slowly discharges the capacitor, and achieves the opposite effect.

The last part of the circuit is the now-familiar phase error detector; it compares the externally-supplied clock to the looped-back output from the VCO. The detector outputs long pulses on the P output if the VCO frequency is lower than the reference clock, or on the R output if the VCO is running too fast. In doing so, the circuit adjusts the capacitor voltage and nudges the VCO to match the frequency and phase of the input waveform.

Toward the frequency multiplier

So far, we have a circuit that synchronizes the VCO with an external clock; that has some uses in communications, but doesn’t seem all that interesting on its own. To take it to the next level, we need to add a small but ingenious tweak:

In this new circuit, we incorporated a frequency divider in the feedback loop. A frequency divider is not a complicated concept; most simply, it can be a binary counter (e.g., 74HC393) that advances by one with every cycle of the input clock. For a three-bit counter, the outputs will be:

Note that the counter produces a square wave with half the clock frequency on the LSB output (Q₀); with one-fourth the frequency on the second output (Q₁); and with one-eighth on the MSB leg (Q₂).

If we choose Q₀ for the divider, the phase error detector will be presented with a looped-back signal that’s equal to one half the running frequency of the VCO; it will then work to get the VCO frequency high enough so that the divided signal matches the reference clock. This will cause the VCO to run exactly twice as fast — and yet, precisely in lockstep with the input clock.

📖

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In today’s episode, I’d like to talk about the use of operational amplifiers to do something other than amplification: to solve analog math. Analog computing at a scale is wildly impractical because errors tend to accumulate every step along the way; nevertheless, individual techniques find a number of specialized uses, perhaps most prominently in analog-to-digital converters. Let’s have a look at how it’s done.

The following assumes familiarity with core concepts in electronic circuits and with the fundamentals of signal amplification. If you need a refresher, start with the two linked articles first.

Op-amps at a glance

Before we get to less obvious circuits, let’s start with a brief recap: operational amplifiers are to analog electronics what logic gates are to digital logic. They are simple but remarkably versatile building blocks that let you accomplish far more than appears possible at first blush.

Unfortunately, in introductory texts, their operation is often explained in confusing ways. All that an op-amp does is taking two input voltages — V_in- (“inverting input”) and V_in+ (“non-inverting input”) — and then outputting a voltage that’s equal to the difference between the two, amplified by a huge factor (A_OL, often 100,000 or more) and then referenced to the midpoint of the supply (V_mid). You can write it the following way:

That’s all the chip does. Because the gain is massive, there is a very narrow linear region near V_in- = V_in+; a difference greater than a couple of microvolts will send the output toward one of the supply rails. The chip doesn’t care about the absolute value of V_in- or V_in+ it can’t “see” any external components you connect to it, and its internal gain can’t be changed.

To show the versatility of the component, we can have a quick look at the following circuit that you might be already familiar with — a non-inverting amplifier:

One input of the op-amp is connected to the external signal source: V_in+ = V_signal. The other input is hooked up to a two-resistor voltage divider that straddles the ground and the output leg; the divider’s midpoint voltage is:

As discussed earlier, the only way for the op-amp to output voltages other than 0 V or V_supply is for V_in+ to be very close to V_in-. We can assume that we’re operating near that equilibrium point, combine the equations for the voltages on the two input legs, and write:

Solving this for V_out, we get:

In other words, the output voltage is the input signal amplified by a factor of 1 + R_f/R_g. We have a near-ideal single-ended voltage amplifier with a configurable gain. Again, the circuit is probably familiar to most folks dabbling in analog electronics, but it’s worth pondering that we implemented it by adding a couple of resistors to a chip that does something conceptually quite different.

Note: there’s a bit more to op-amp lore when dealing with high-frequency signals; a more rigorous analysis of their frequency characteristics can be found in this article.

Addition

Now that we have the basics covered, we can show that op-amps can do more than just amplify signals. The first contender is the following summing layout that differs from what’s usually covered in textbooks, but that’s well-suited for single-supply use:

Assuming well-behaved signal sources that can supply and sink currents, it should be pretty intuitive that the voltage on the V_in+ leg is just an average of three input signals:

For readers who are unpersuaded, we can show this from Kirchoff’s current law (KCL); the law essentially just says “what comes in must come out” — i.e., the currents flowing into and out of the three-resistor junction must balance out. If we use V_jct to denote the voltage at the junction, then from Ohm’s law, we can write the following current equations for each resistor branch:

Further, from KCL, we can assert that the currents must balance out: I₁ + I₂ + I₃ = 0 A. Combining all these equations and multiplying both sides by R, we get:

Solving for V_jct, we get (V_A + V_B + V_C) / 3. We have a confirmation that the input-side resistor section averages the input voltages.

To be fair, the averaging portion of the circuit has a minor weakness: it depends some inputs sinking current while others source it. Some signal sources might not have that ability. That said, compared to the alternative design, it has the benefit of being more useful in single-supply circuits, so let’s stick with that.

Moving on to the op-amp section: this is just another sighting of the non-inverting amplifier. The gain of the amplifier circuit is set by the R_f and R_g resistors, and in this instance, works out to A = 1 + R_f/R_g = 3. In other words, the signal on the output leg is:

That looks like a sum! But it also feels like we cheated in some way: it just so happens that we could implement averaging using passive components, and then tack on an amplifier for some gain. Surely, resistor magic can’t get us much further than that?

Subtraction

It can! The next stop is subtraction, which can be achieved with the following circuit topology:

We can start the analysis with the non-inverting input of the amplifier. The signal on this leg is generated by a voltage divider consisting of two identical resistances connected in series between V_A and the ground. In other words, the voltage here is V_in+ = ½ · V_A.

The inverting input is a voltage divider too, except it produces a voltage that’s halfway between V_B and V_out: V_in- = ½ · (V_B + V_out).

As with any op-amp topology, linear operation can happen only when V_in- ≈ V_in+. In other words, we can assert that for the circuit to function, the following must be true:

We can cancel out the repeated ½ term on both sides, and then reorder the equation to:

Neat: that’s precisely what we’ve been trying to do.

To be fair, not all is roses: in a single-supply circuit, an op-amp can’t output negative voltages, so the topology we’ve just analyzed works only if V_A > V_B; otherwise, V_out just hits the lower rail and stays there until the input voltages change.

To accommodate use cases where V_A < V_B, we’d need to use a higher output voltage as the “zero” point (V_zero). For example, if V_zero = 2.5 V, then a computed difference of -1 V could be represented by V_out = V_zero - 1 V = 1.5 V; in the same vein, a difference of +2 V could correspond to V_out = 4.5 V.

To do this, we just need to disconnect the bottom voltage divider from the ground and replace 0 V with a fixed “zero” voltage of our choice. This changes the equation for the positive leg to V_in+ = ½ · (V_A + V_zero). The overall equilibrium condition becomes:

After tidying up and solving for the output signal, we get:

A common choice of a reference point would be the midpoint of the supply (V_mid = ½ · V_supply).

Multiplication and division

The concept of analog computation can be also extended to multiplication and division. The most common and mildly mind-bending approach hinges on the fact that any positive number can be rewritten as a constant base n raised to some power; for example, 8 can be written as 2³, while 42 is approximately 2^5.3924.

From the basic properties of exponentiation, it’s easy to show that n^a · n^b is the same as n^a+b; it follows that if we have two numbers represented as exponents of a common base, we can reduce the problem of multiplication to the addition of these exponents.

We already know how to build a summing circuit, so all we’re missing is a way to convert a number to an exponent. We don’t really care what base we’re using, as long as the base remains constant over time.

This brings us to the following design:

As before, the linear equilibrium condition requires V_in- ≈ V_in+. Let’s assume that the initial input voltage is about equal to V_zero; in this case, the output settles in the same vicinity.

Next, let’s analyze what would happen if the input voltage increased by v_s = 100 mV. In such a scenario, for the op-amp to stay at an equilibrium of V_in- ≈ V_in+, we would need a sufficient current to flow through the resistor to create a 100 mV voltage drop:

The op-amp has a very high input impedance, so the current must flow through the diode; if it doesn’t, that’d move the circuit toward a condition of V_in- ≫ V_in+, which would cause V_out to move toward the negative supply rail. That would forward-bias the diode and thus motivate it to conduct better. In other words, the circuit has an automatic mechanism that coerces the diode to admit the current matching I_R, and the amount of convincing is reflected in how much the output voltage has been reduced from the midpoint. We can denote this relative shift as v_o.

From an earlier feature about diodes, you might recall that although the relationship between the applied diode voltage and the resulting current is complicated, there is an initial region where the component’s V-I curve is exponential. In the following plot for a 1N4148 diode, this property holds up for currents up to about 1 mA:

In other words, if the input resistor is large enough (10 kΩ or so), we can say that v_o will be dictated by the magnitude of an exponent of some constant base n that yields the correct diode current: I_D = n^vₒ.

We also know that the current that must flow through the diode is proportional to the shift in the input signal (v_s) divided by R. This means that we’ve accomplished the number-to-exponent conversion between v_s and v_o. Or, in the mathematical parlance, we’ve calculated a logarithm.

To implement multiplication, we need two logarithmic converters on the input side, a summing amplifier to add the exponents, and then an exponential converter that goes from the summed exponent back to a normal value. That last part can be accomplished by switching the location of the diode and the resistor in the log converter circuit we already have.

Integration

Integration is just a fancy word for summing values over time; if you want to sound posh, you can say that a bucket in your backyard “integrates” rainfall over the duration of a storm.

Although integration is important in calculus, analog integrators have down-to-earth uses too. For example, the circuits can convert square waves into triangular shapes that are useful in electronic musical instruments. The circuit’s ability to produce very linear up and down slopes also comes in handy in slope-based and delta-sigma ADCs.

The simplest, textbook integrator is shown below:

Once again, we can note that the linear operation condition is V_in- ≈ V_in+. Further, let’s assume that the input signal is equal to V_zero and the capacitor is discharged, so both op-amp inputs and the output are at about the midpoint.

Next, similarly to the analysis we’ve done for the log amplifier, let’s assume that the input signal shifts up by v_s = 100 mV. For the op-amp to stay at an equilibrium, we would need a sufficient current to flow through the resistor to create a 100 mV voltage drop: I_R = v_s/R.

The only possible path for this current is the capacitor; a capacitor doesn’t admit steady currents, but it will allow the movement of charges during the charging process, which will kick off when the op-amp’s output voltage begins to drop; this drop causes a voltage differential appears across the capacitor’s terminals.

From the fundamental capacitor equation, charging the capacitor with a constant current I_R for a time t will produce the following voltage across its terminals:

To keep V_in- steady, the voltage to which the capacitor gets charged must be accounted for by a directionally opposite shift of the output voltage (v_o). The shift will persist after V_signal returns to the midpoint, because with no charging or discharging current, the capacitor just retains charge. The shift can be undone if v_s swings the other way around.

From the earlier formula for the capacitor voltage, it should be clear that the circuit keeps a sum of (midpoint-relative) input voltages summed over time.

The textbook integrator we’ve been working with has an inverted output: V_out moves down whenever V_signal moves up; this makes it somewhat clunky to use in single-supply applications. The problem can be addressed in a couple of intuitive ways, but a particularly efficient — if positively cursed — solution is shown below:

As in all other cases, the prerequisite for linear operation is V_in- ≈ V_in+.

We can start the analysis with the two-resistor divider on the top: it simply ensures that V_in- is equal to ½ · V_out. As the bottom portion of the circuit, the instantaneous voltage on the non-inverting input is decided by the capacitor’s charge state (V_cap). The bottom resistors will influence the charge of the capacitor over time, but if we’re living in the moment, we can combine the equations and write the following equilibrium rule:

Equivalently, we can say that V_out ≈ 2 · V_cap.

We have established that V_out is equal to twice the value of V_cap, but if so, the resistor on the bottom right is subjected to a voltage differential between these two points (always equal to V_cap). From Ohm’s law, the resistor will admit the following current:

If the input voltage is zero, the neighboring resistor to the left is subjected to the same voltage differential, so the current flowing into the junction (I₁) is the same as the current flowing out (I₂). With the currents in balance, the capacitor holds its previous charge and the output voltage doesn’t change.

That said, if the input voltage (V_signal) is non-zero, the voltage differential across the terminals of the resistor on the left is different, and the formula for I₂ becomes:

In this case, there is a non-zero balance of the currents flowing in and out via the resistors:

This current is flowing in via the resistor on the right but not flowing out via the resistor on the left, so it necessarily charges the capacitor. Note that the capacitor charging current is independent of V_cap; it remains constant as long as the input voltage is constant too.

As before, from the fundamental capacitor equation (V = I·t/C), we can tell that a constant charging current will cause the voltage on the output leg to ramp up in a straight line. Of course, this will come to an end once we hit the output voltage limit of the amplifier. To reset the circuit, we’d need to short the terminals of the capacitor.

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In today’s episode, let’s continue down that path and consider an even more perplexing example: a switched capacitor lowpass filter. The usual way to design an analog lowpass filter is to combine a resistor with a capacitor, as shown below:

The filter can be thought of as a voltage divider in which R is constant and C begins to conduct better as the sine-wave frequency of the input signal increases. This frequency-dependent resistor-like behavior of a capacitor is known as reactance and is described by the following formula:

Most sources give this equation without explaining where it comes from, but it can be derived with basic trigonometry; if you’re unfamiliar with its origins, you might enjoy this foundational article posted here back in 2023.

In an R-C lowpass circuit, the reactance is initially much larger than the value of R, so up to a certain frequency, the capacitor can be ignored and the input voltage is more or less equal to the output voltage. Past a certain point, however, the reactance of the capacitor becomes low enough so that the signal is markedly pulled toward the ground, attenuating it and producing a filter response plot similar to the following:

It’s easy to find the frequency at which R = X_C. The solution corresponds to the “knee” in the logarithmic plot shown before:

This is basic analog electronics, and something we covered on the blog before. But did you know that you can construct a perfectly good lowpass filter with a pair of capacitors and a toggle switch? The architecture is shown below:

In practical circuits, the “switch” would be a pair of MOSFETs driven by a timing signal, but nothing stops us from using a real switch or an electromechanical relay to experiment with this topology on a breadboard.

In the first half of the timing cycle, the switch is in position A. This connects a small input capacitor, C_in, to the input terminal. As soon as the connection is made, the capacitor charges to a voltage equal to the momentary level of the input waveform, which we can denote as V_A.

In the second half of the cycle, the two-way switch is moved to position B. This causes the voltages across C_in and C_out to equalize. We don’t need to calculate the relative shifts in their terminal voltages; we’ll approach it symbolically and just say that C_in started at V_A and ended up at V_B.

With this in mind, we can apply a a form of the fundamental capacitor equation (I = C·Δv/t) to find the average current that must have flowed out of C_in to shift its voltage from V_A to V_B in time t:

The overall duration of the charge transfer cycle (t) is the reciprocal of the switch-toggling frequency f_s, so we can also restate this as I_B = (V_A - V_B) · C_in · f_s.

The formulas tell us that the average current is proportional to to the voltage present across the A and B terminals of the switch, multiplied by a constant proportional to the switching frequency and the capacitor value. The actual current is pulsed, but it depends on a voltage differential in a manner similar to the behavior of a series resistor (I = V/R). In fact, from Ohm’s law, we can find the equivalent input resistance that would deliver the same current to C_out:

If the circuit can be modeled as a series resistor feeding a shunt capacitor, we’re essentially looking at a bog-standard lowpass R-C architecture. The knee frequency of this R-C filter can be written as:

The math might seem improbable, but the circuit works in practice. The following oscilloscope traces show a filter constructed with C_in = 100 nF and C_out = 1 µF, toggled at f_s = 50 Hz. This corresponds to f_knee ≈ 0.8 Hz — and indeed, we see some attenuation for a 1 Hz input sine, and a lot more for a 5 Hz one:

The plot also offers an intuitive interpretation of the math: in each clock cycle, only a certain amount of charge can move between the capacitors; this corresponds to the maximum height of a single step in the output waveform, proportional to the relative sizing of the caps (i.e., the ratio of C_in to C_out). The larger the vertical step, the easier it is for the output waveform to track a fast-moving input signal.

The switching frequency f_s controls how many charge transfers occur per second, which gives us another method of controlling the filter’s center frequency: to shift it, we can simply speed up or slow down the supplied clock. That’s a major boon for digitally-controlled analog signal processing.

In practice, to minimize the stairstep pattern, we tend choose the switching frequency f_s to be about two orders of magnitude higher than the filter’s intended center frequency. To achieve this, from the earlier f_knee formula, we need to aim for C_out ≈ 16 · C_in.

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The basic charge pump architecture — a voltage doubler — is quite elegant and easy to understand. It’s also far more common than many people suspect: the circuit can be constructed directly on a silicon die, so it shows up inside quite a few digital chips, from modern op-amps to MCUs. If you weren’t a subscriber back in 2023, or if you don’t have a photographic memory for random blog articles, a conceptual diagram of the pump is shown below:

In the panel on the left, we see a Cout capacitor that’s perched on top of the positive rail while a “flying” capacitance Cf is charging from the power supply. The charging process produces a voltage that’s internal to the component: we can unplug Cf, put it in our pocket, and then hook it up to another circuit to power it for a brief while.

In the second panel (right), we see the second part of the cycle: Cf is disconnected from the supply and then hooked up to the terminals of Cout. This action transfers some of the charge from Cf to Cout, up until the voltages across the terminals of the capacitors are equalized. After several of these roundtrips, V_AB should approach Vsupply. Of course, V_BC is also equal to Vsupply; it follows that the voltage between A and C must be the sum of the two, or 2 · Vsupply.

In other words, the circuit is a voltage doubler; the repeated motion of Cf ensures that the charge in Cout is continually replenished if we connect any load between the points A and C. There will be a bit of voltage ripple, but the amount can be controlled by sizing the capacitors and choosing the operating frequency to match the intended load.

Naturally, practical charge pumps don’t mechanically move a capacitor around. Instead, they use transistors configured as switches to alternately connect Cf to to the supply and to the output cap, an architecture that can be sketched the following way:

The transistors themselves can be driven by a simple relaxation oscillator or by a programmable digital chip.

A similar circuit can be used to produce negative voltages: we do this simply by dangling Cout from the negative supply rail instead of perching it on top of the positive one. This modification effectively places the capacitor’s bottom terminal at -Vsupply.

So far, so good. But this brings us to a more perplexing flavor of the charge pump — the voltage-halving topology shown below:

What’s that, you might ask — a capacitor-based voltage divider? Well, yes and no. Capacitors can be used as voltage dividers for AC signals: they exhibit a resistance-like effect known as reactance, so if you have an alternating sinusoidal waveform, you can attenuate it that way. That said, the divider doesn’t really work for DC voltages, because at 0 Hz, the reactance approaches infinity.

To grasp the design, ignore Cf and the attached load. Let’s focus just on the pair of series capacitors: C1 and C2. When these two capacitors are first connected to the power supply, they can be analyzed as a single composite capacitance, with some common charging current that will briefly flow through this circuit branch. In particular, if C1 = C2, the common current will produce roughly the same charge state for each capacitor, resulting in V_AB ≈ V_BC ≈ Vsupply / 2.

This sounds like the outcome we’re after, but once the common charging current ceases, there’s nothing to keep the voltages the same. In particular, if we connect a resistive load across terminals B and C, the bottom capacitor will discharge to 0 V; the reduction in the voltage at point B will also allow the upper capacitor to charge in a way that makes up the difference. A momentary current will flow, but the end state is V_AB = Vsupply, V_BC = 0 V, and Iout = 0 A.

This sounds useless, but that’s where the flying capacitor — Cf — comes into play. If it’s moved back and forth between C1 and C2, it will charge from the capacitor that sits at a higher voltage and then discharge into the one that’s at a lower voltage; in our example, it will continually replenish the charge in C2, allowing a steady current to flow through the load.

The stable equilibrium for this charge transfer process is reached when V_AB ≈ V_BC ≈ Vsupply / 2 — so in contrast to conventional voltage dividers, the output voltage is always at the midpoint between the supply rails, with no dependency on the relative values of C1 and C2. Pretty neat!

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In reality, circuits with gain can occasionally oscillate by accident, but it’s rather difficult to build a good analog oscillator from scratch. The most common category of oscillators you can find on the internet are circuits that don’t work reliably. This is followed by approaches that require exotic components, such as center-tapped inductors or incandescent lightbulbs. The final group are the layouts you can copy, but probably won’t be able to explain to a friend who doesn’t have an EE degree.

In today’s article, I wanted to approach the problem in a different way. I’ll assume that you’re up-to-date on some of the key lessons from earlier articles: that you can tell the difference between voltage and current, have a basic grasp of transistors, and know what happens when a capacitor is charged through a resistor. With this in mind, let’s try to construct an oscillator that’s easy to understand, runs well, and has a predictable operating frequency. Further, let’s do it without peeking at someone else’s homework.

Swing… and miss

The simplest form of an oscillator is a device that uses negative feedback to cycle back and forth between two unstable states. To illustrate, think of a machine equipped with a light sensor and a robotic arm. In the dark, the machine is compelled to stroll over to the wall switch and flip it on. If it detects light, another part of its programming takes over and toggles the switch off. The machine is doomed to an endless cycle of switch-flipping at a frequency dictated by how quickly it can process information and react.

At first blush, we should be able to replicate this operating principle with a single n-channel MOSFET. After all, a transistor can be used as an electronically-operated switch:

The transistor turns on when the voltage between its gate terminal and the source leg (Vgs) exceeds a certain threshold, usually around 2 V. When the power supply first ramps up, the transistor is not conducting. With no current flowing through, there’s no voltage drop across the resistor, so Vgs is pulled toward the positive supply rail. Once this voltage crosses about 2 V, the transistor begins to admit current. It stands to reason that the process shorts the bottom terminal of the resistor to the ground and causes Vgs will plunge to 0 V. If so, that would restart the cycle and produce a square wave on the output leg.

In practice, this is not the behavior you’ll see. For a MOSFET, the relationship between Vgs and the admitted current (Id) is steep, but the device is not a binary switch:

In particular, there is a certain point on that curve, somewhere in the vicinity of 2 V, that corresponds to the transistor only admitting a current of about 300 µA. From Ohm’s law, this current flowing through a 10 kΩ resistor will produce a voltage drop of 3 V. In a 5 V circuit, this puts Vgs at 5 V - 3 V = 2 V. In other words, there exists a stable equilibrium that prevents oscillation. It’s akin to our robot-operated light switch being half-on.

Trigger warning

To fix this issue, we need to build an electronic switch that has no stable midpoint. This is known as Schmitt trigger and its simple implementation is shown below:

To analyze the design, let’s assume the circuit is running off Vsupply = 5 V. If the input signal supplied on the gate of the left transistor is 0 V, this transistor will not be not conducting, which pulls Vgs for the other MOSFET all the way to 5 V. That input allows nearly arbitrary currents to flow through the right branch of the circuit, making that current path more or less equivalent to a two-resistor a voltage divider. We can calculate the midpoint voltage of the divider, as marked with an arrow on the schematic:

This voltage also appears on the source terminal of the input transistor on the left. The actual Vth for the BS170 transistors in my possession is about 2.15 V, so in this scenario, for the input-side transistor to turn on, the supplied signal will need to exceed Vs + Vth ≈ 2.6 V. Once that happens, a large voltage drop will appear across R1, reducing the Vgs of the output-side transistor below the threshold of conduction, and choking off the current in the right branch.

At this point, there’s still current flowing through the common resistor on the bottom, but it’s increasingly sourced via the left branch. The left branch forms a new voltage divider; because R1 has a higher resistance than R2, Vs is gradually reduced, effectively bumping up the gate-to-source differential for the left transistor and thus knocking it more firmly into conduction even if the input voltage remains constant. This is a positive feedback that gives the circuit no option to linger in a half-on state.

Once the transition is complete, the voltage drop across the bottom resistor is down from 450 mV to about 50 mV. This means that although the left transistor first turned on when the input signal crossed 2.6 V in reference to the ground, it will not turn off until the voltage drops all the way to 2.2 V — a 400 mV gap.

Triumph of the switch-flipping bot

This circuit lets us build what’s known as a relaxation oscillator. To do so, we only need to make two small tweaks. First, we need to loop an inverted output signal back onto the input; the most intuitive way of doing this is to add another transistor in a switch-like configuration similar to the failed design of a single-transistor oscillator mentioned earlier on. This building block, marked on the left, outputs Vsupply when the signal routed to the gate terminal is 0 V, and produces roughly 0 V when the input is near Vsupply:

Next, to set a sensible oscillation speed, we need to add a time delay, which can be accomplished by charging a capacitor through a resistor (middle section). The resistor needs to be large enough not to overload the inverter stage.

For the component values shown in the schematic, the circuit should oscillate at a frequency of almost exactly 3 kHz when supplied with 5 V:

The frequency is governed by how long it takes for the capacitor to move Δv = 400 mV between the two Schmitt thresholds voltages: the “off” point at 2.2 V and the “on” point at 2.6 V.

Because the overall variation in capacitor voltage is small, the we can squint our eyes and say that the voltage across the 100 kΩ resistor is nearly constant in every charge cycle. When the resistor is connected to the positive rail, V_R ≈ 5 V – 2.4 V ≈ 2.6 V. Conversely, when the resistor is connected to the ground, we get V_R ≈ 2.4 V. If the voltages across the resistor are nearly constant, so are the resulting capacitor currents:

From the fundamental capacitor equation (Δv = I · t/C), we can solve for the charging time needed to move the voltage by Δv = 400 mV; the result is about 154 µs for the charging period and 167 µs for the discharging period. The sum is 321 µs, corresponding to a frequency of about 3.1 kHz – pretty close to real life.

Three transistors? I’m not made out of money!

The circuit can be simplified to two transistors at the expense of readability, but if you need an analog oscillator with a lower component count, an operational amplifier is your best bet.

If you’re rusty on op-amps, I suggest pausing to review the article linked in the preceding paragraph. That said, to understand the next circuit, all you need to know is that an op-amp compares two input voltages and that Vout swings toward the positive rail if Vin+ ≫ Vin- or toward the negative rail if Vin+ ≪ Vin-.

For simplicity, let’s choose R1 = R2 = R3 and then look at the non-inverting (Vin+) input of the chip. What we have here is a three-way voltage divider: the signal on the non-inverting input is simple average of three voltages: Vsupply (5 V), ground (0 V), and Vout. We don’t know the value of Vout just yet, but it can only vary from 0 V to Vsupply, so the V_in+ signal will always stay between ⅓ · Vsupply and ⅔ · Vsupply.

Next, let’s have a look at the inverting input (Vin-). When the circuit is first powered on, the capacitor C isn’t charged, so Vin- sits at 0 V. Since the voltage on the non-inverting input can’t be lower than ⅓ · Vsupply, this means that on power-on, Vin+ ≫ Vin-, sending the output voltage toward the positive rail. When Vout shoots up, it also bumps the Vin+ average to ⅔ · Vsupply.

Because Vout is now high, this starts the process of charging the capacitor through the bottom resistor (R_cap). After a while, the capacitor voltage is bound to exceed ⅔ · Vsupply. The capacitor voltage is also hooked up to the amplifier’s inverting input, and at that point, Vin- begins to exceed Vin+, nudging the output voltage lower. Stable equilibrium is not possible because this output voltage drop is immediately reflected in the three-way average present on the Vin+ leg, pulling it down and causing the difference between Vin- and Vin+ to widen. This positive feedback loop puts the amplifier firmly into the Vin+ ≪ Vin- territory.

At that point, Vout must drop to 0 V, thus lowering the voltage on the non-inverting leg to ⅓ · Vsupply. With Vout low, the capacitor starts discharging through R_cap,. It needs to travel from the current charge state of ⅔ · Vsupply all the way to ⅓ · Vsupply before Vin- becomes lower than Vin+ and the cycle is allowed to restart.

The continued charging and discharging of the capacitor between ⅓ · Vsupply and ⅔ · Vsupply results in periodic oscillation. The circuit produces a square wave signal with a period dictated by the value of C and R_cap. The frequency of these oscillations can be approximated analogously to what we’ve done for the discrete-transistor variant earlier on. In a 5 V circuit with R1 = R2 = R3, the capacitor charges and discharges by Δv ≈ 1.67 V. If R_cap = 10 kΩ, then the quasi-constant capacitor charging current is I ≈ 2.5 V / 10 kΩ ≈ 250 µA.

Knowing Δv and I, and assuming C = 1 µF, we can tap into the capacitor equation (Δv = I · t/C) to solve for t. The result is 6.67 ms. This puts the charge-discharge roundtrip at 13.34 ms, suggesting a frequency of 75 Hz. The actual measurement is shown below:

The observed frequency is about 7% lower than predicted: 70 instead of 75 Hz. Although I could pin this on component tolerances, a more honest explanation is that at Δv ≈ 1.67 V, the constant-current approximation of the capacitor charging process is stretched thin; the segments in the bottom oscilloscope trace diverge quite a bit from a straight line.

Short of reducing R3 to bring down Δv and thus reduce the variations in current, the way to develop a better formula is to tap into the equation for a capacitor charged by a constant voltage via a resistor, as derived here:

To make the math simple, we can use ⅓ · Vsupply as the reference point for the calculation, because that’s the starting voltage for the charging process and the capacitor never discharges below that level. In this view, the “virtual” supply voltage is Vin = ⅔ · Vsupply (because we took away the unused bottom ⅓ of the range) and the capacitor is charging to 50% of that value.

To find the charging time, we just need to rearrange the R-C formula for the Vcap/Vin ratio, and then solve for t at which the ratio works out to 50% (0.5):

After moving 1 to the left and flipping signs, the equation simplifies to:

From there, we can take a natural logarithm of both sides:

…and solve for t:

In this particular case, the charging resistor is called Rcap, so the equation should be restated as:

The value of t can be used to find the oscillation frequency:

If we plug 1 µF and 10 kΩ into the equation, the value works out to 72 Hz, which is within 3% of the observed behavior, comfortably within the tolerances of standard passive components.

As an aside, it’s worth noting that if we revise the circuit to connect the top terminal of R1 to a lower positive reference voltage, or if we connect the bottom terminal of R2 to a higher voltage, it will have the effect of reducing the distance between circuit’s Schmitt trigger voltages while still allowing the capacitor to charge from Vsupply. Reducing this distance has the effect of increasing the oscillation frequency; this makes for a rudimentary voltage-controlled oscillator (VCO), which has a number of uses — from musical instruments, to radios, to digital clock multipliers.

The phase-shift approach

The method outlined earlier on is not the only conceptual approach to build oscillators. Another way is to produce resonance. We can do this by taking a standard op-amp voltage follower which uses negative feedback to control the output — and then mess with the feedback loop in a particular way.

In the basic voltage follower configuration, the op-amp reaches a stable equilibrium when Vin+ ≈ Vin- ≈ Vout. Again, the circuit works only because of the negative feedback loop; in its absence, Vin- would diverge from Vin+ and the output voltage would swing toward one of the supply rails.

To turn this circuit into an oscillator, we can build a feedback loop that normally provides negative feedback, but that inverts the waveform at a particular sine-wave frequency. This turns negative feedback into positive feedback; instead of stabilizing the output voltage, it produces increasing swings, but only at the frequency at which the inversion takes place.

Such a selective waveform inversion sounds complicated, but we can achieve it a familiar building block: an R-C lowpass filter. The mechanics of these filters are discussed in this article; in a nutshell, the arrangement produces a frequency-dependent phase shift of 0° (at DC) to -90° (as the frequency approaches infinity). If we cascade a couple of these R-C stages, we can achieve a -180° phase shift at some chosen frequency, which is the same as flipping the waveform.

A minimalistic but well-behaved op-amp solution is shown below:

In this particular circuit, an overall -180° shift happens when each of the R-C stages adds its own -60°. It’s easy to find the frequency at which this occurs. In the aforementioned article on signal filtering, we came up with the following formula describing the shift associated with the filter:

Arctangent is the inverse of the tangent function. In a right triangle, the tangent function describes the ratio of lengths of the opposite to the adjacent for a particular angle; the arctangent goes the other way round, giving us an angle for a particular ratio. In other words, if x = tan(α) then α = arctan(x). This allows us to rewrite the equation as:

We’re trying to solve for f at which θ = -60°; the value of -tan(-60°) is roughly 1.73, so we can plug that into the equation and then move everything except f to the right. Throwing in the component values for the first R-C stage in the schematic, we obtain:

You’ll notice that the result is the same for the other two stages: they have higher resistances but proportionally lower capacitances, so the denominator of the fraction doesn’t change.

Oscilloscope traces for the circuit are shown below:

Because the amplifier’s gain isn’t constrained in any way, the output waveform is a square wave. Nevertheless, in a lowpass circuit with these characteristics, the waveforms produced by the R-C stages in response to a square-wave input are close enough to sinusoids that the sine-wave model approximates the behavior nearly perfectly. We can run a discrete-time simulation to show that the sine-wave behavior of these three R-C stages (gray) aligns pretty well with the square-wave case (blue):

To make the output a sine wave, it’s possible to tinker with with the feedback loop to lower the circuit’s gain, but it’s hard to get it right; insufficient gain prevents oscillation while excess gain produces distortion. A simpler trick is to tap into the signal on the non-inverting leg (bottom oscilloscope trace) and use the other part of a dual op-amp IC to amplify this signal to your heart’s desire.

Some readers might be wondering why I designed the stages so that each of them has an impedance ten times larger than the stage before it. This is to prevent the filters from appreciably loading each other. If all the impedances were in the same ballpark, the middle filter could source currents from the left as easily as it could from the right. In that situation, finding the point of -180° phase shift with decent accuracy would require calculating the transfer function for the entire six-component Franken-filter; the task is doable but — to use a mathematical term — rather unpleasant.

Footnote: in the literature, the circuit is more often constructed using highpass stages and a discrete transistor as an amplifier. I’d wager that most authors who present the discrete-transistor solution have not actually tried it in practice; otherwise, they would have found it to be quite finicky. The version presented in this article is discussed here.

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If you liked the article, you’ll enjoy The Secret Life of Circuits. It’s a richly illustrated, lucid introduction to electronics — from the physics of conduction to embedded system programming. It features 290+ color diagrams, 420+ pages of original content, and zero AI.

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There are some activists who try to stigmatize the use of generative AI for content creation, but they often end up chasing ghosts; so far, I had two people accuse me of using AI on this blog, and I’m sure there’s more to come. The controversy around em dashes (—) is instructive. I think it’s important to realize that language model output doesn’t differ from human writing per se; there’s just no single tell. What’s true, however, is that if you go to chatgpt.com and ask for an essay, it will by default assume a certain writer persona. All articles written by that persona will have similarities, just as all articles written by the same human would.

The quirks start with basic formatting. For example, the current crop of chatbots has a preference for book-style capitalization of section headings (“Status in Academic Departments”) versus the more common Wikipedia style (“Status in academic departments”); in the same vein, LLMs opt for bolded text instead of italics for emphasis. The models also overuse various stylistic cliches, including negative parallelisms (“not only … but …”, “not …, not …, just …”), vague appeals to significance (“illustrates lasting influence”, “emphasizes the importance of …”), and superfluous outline and summary paragraphs.

Again, there’s no single bulletproof indicator, but contrary to some nerd lore, the totality of these statistical patterns can be detected with automated tools: if Pangram flags something as LLM output, you probably shouldn’t dismiss the finding out of hand. At the same time, such tests are not enough. First, there’s a relatively small proportion of people who also write that way; it’s not good prose, but it’s also not a reason to burn them at the stake. Second, a clever user can prompt an LLM to use a different voice. Ask a chatbot to write as a grizzled sailor — a man of few words who’s still grieving the loss of his wife and only child — and the mathematics get out of whack.

Because of these gotchas, I tend to lean on three additional, higher-level heuristics. First, on the topic of style, I ask myself if the author’s works exhibit any unusual yet consistent writing traits. Every person has some: a preference for overly long sentences, a tendency to overuse semicolons, a propensity for colorful asides or dry wit, or maybe a recurring odd idiom or a mixed metaphor. If a given pattern isn’t common in the training data, the chatbot won’t replicate it unless given an oddly specific prompt (e.g., “always hyphenate the word ‘co-worker’“). If you go through several pages of writing and can’t identify any rare traits, it’s a reason for concern.

Another good question to ponder is why the article exists in the first place. Long-form text takes effort and time. Setting aside compelled writing such as school essays, we write when we have something interesting to say. On an online blog, you should be able to discern the author’s interests and pet peeves. The path of the reverse engineer is to ask what’s the shortest LLM prompt the article could be compressed into. If the prompt is vague and aimless — “generate an article about the importance of Immanuel Kant in the age of AI” — something might be amiss.

The final experiment is to plug this hypothetical prompt into an LLM of your choice. If the model produces something functionally similar to the original article — the same outline, the same metaphors, the same conclusions — it’s a fairly clear sign of LLM chicanery.

All this leads to a more fundamental question: is it even useful to know? I have my misgivings about the origins of the tech: years of my hard work ended up getting pulled into the training datasets without any acknowledgment, let alone consent. I’m sure this is also the fate of any future books I publish and web articles I write, no matter the license or the contents of robots.txt. At the same time, the ship has sailed: most people don’t enjoy the writing process and see a “get it done” button as a godsend. No one cares about the hurt feelings of bloggers who refuse to get with the times.

In the end, if you employ a chatbot as a copyeditor but stand by the result, I’m happy for you. Conversely, if the article you’re posting on the internet doesn’t represent any real cognitive effort and has no discernible goal, then something’s broken — but that’s true no matter if the text is LLM-generated or not.

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The equation is deemed profound because it combines not one, not two, but five “special” mathematical constants: e, π, 0, 1, and the imaginary unit i.

The identity is a special case of an equation known as Euler’s formula:

The identity form is what you get if you choose an angle of α = π in radians (180°). This makes the cosine expression equal to -1 and the sine part equal to zero, so the final result of the substitution is:

Now, four “special” values is still weak sauce, so we move -1 to the left to increase the profoundness factor by another 25%.

There are multiple “easy” proofs of Euler’s formula you can find on YouTube, but they all involve sleight of hand: they make unobvious assertions about infinite series and function derivatives, or rely on a circular definition of complex numbers. I don’t have a proof that will fit on a napkin, but I think there’s a reasonably intuitive way to reason about what the equation does.

A geometric view of complex numbers

Imagine a point in a Cartesian coordinate system that lies on the horizontal axis at a distance l from the center. If you wish to rotate this point by an angle α in radians, you can calculate the new (x, y) coordinates using simple trigonometry:

Less obviously, there is also a way to rotate points without trigonometric functions. If we take point (x, y) and flip the signs of the individual coordinates — (-x, -y) — we always achieve what looks like a rotation by 180°:

The sign-flipping operation is equivalent to multiplication by -1. Changing the magnitude of the negative multiplier doesn’t result in a different rotation angle; it’s the “negative unit" itself (-1) that appears to be doing the hard work. If we want to achieve a rotation by 360°, we need to multiply the coordinates by -1 twice; the pattern extends in a pretty obvious way:

This leads to a peculiar realization: it would appear that to achieve rotations of less than 180°, we could raise -1 to a fractional power. In particular, to obtain 90°, we seemingly need an exponent halfway between (-1)⁰ and (-1)¹. In other words, we need to multiply the coordinates by (-1)^½. This multiplier, known as i, can be also written as √(-1).

The number i is not a real. That’s not to say that it doesn’t exist; it just isn’t a member of the set of real numbers, ℝ. The construct lets us represent the coordinates of any point (x, y) as a single compound (“complex”) number:

The first part corresponds to the distance along the horizontal axis. The second (i-coupled) value is a number that’s evidently “rotated” by 90° — i.e., it represents the distance along the vertical axis.

This might sound unhinged, but the result is a coherent model of 2D geometry, and standard algebra extends to this i-containing realm in a pretty straightforward way. For the most part, you just work on the two halves of a complex number separately, keeping in mind that i · i = -1.

With the z = x + iy construction in tow, let’s go back to the earlier method of rotating a segment of length l by an angle α:

Nothing stops us from combining these coordinates into a single complex number z that represents the x and y coordinates of the rotated point:

Equivalently, as discussed earlier on, we can express rotation by m · 90° by multiplying the starting length l by the correct power of i:

In the first equation, the angle of rotation (α) is expressed in radians, so a full 360° turn is achieved when α = 2π. In the second version, it’s expressed in 90° increments, so a full rotation is m = 4. To reconcile these equations, we need to toss in the appropriate scaling factor. If we do it on the i^m side to settle on radians, we get:

This can be further simplified by choosing l = 1, essentially building a model of a point moving along a unit circle with a radius of one:

The equation is already in the same ballpark as Euler’s formula, but we’re not quite done yet.

Imaginary bases and exponents

In the realm of real numbers, exponentiation that uses one positive base other than 1 can be rewritten in another base simply by tossing in an appropriate scaling factor in the exponent. For example, we can write the following:

The scaling factor is just the logarithm of the old base in the new base: log₂(8) = 3.

Logarithms can be seamlessly extended to complex numbers, allowing us to move between real and imaginary bases in exponentiation. As a trivial example, if (-1)^½ = i, we can infer that log_-1(i) = ½. Knowing this, we can apply the earlier rule to convert between an imaginary base i and a real base -1, with unsurprising results:

In the same vein, there exists a logarithm that nets us a scaling factor to move from base i to base 10:

The value of log₁₀(i) can’t be a real number because if we choose x = 2, the left-hand side works out to -1, and there’s no real c for which 10^c is negative. That said, we can make this equivalence work with imaginary-number solutions, netting us a coherent algebra without any overt contradictions.

In that system, the value of log₁₀(i) would need to work out to roughly 0.682·i, but we don’t need to know how to calculate it just yet. The point is just that the two earlier forms — i^x and 10^{<some i-containing constant>·x} — can be considered equivalent. They both represent rotation by a chosen angle in a two-dimensional space.

♫ You spin me ‘round (like a record)

Before the segue into the properties of exponentiation, we established the following formula that equated two methods of rotating a point:

On the left side of the equation, we needed to toss in a 2/π scaling factor to convert from 90° increments to radians. It would be nice to switch to a different, real-number base n that naturally has the same rotation speed as the cos + sin expression. This would let us simplify the formula to:

The cos + sin expression is drawing a circle with a radius of 1, completing one rotation every 2π radians. The circumference of the unit circle is 2π, so there is a 1:1 correspondence between the parameter of the expression (α) and the distance traveled by the moving point.

Again, we’d like to meet that rotation on the left side of the equation by choosing the right n so that there is a 1:1 relationship between the increment in α and the travel of the coordinate produced by exponentiation (n^iα).

As luck would have it, there is a well-known real base for which there is a 1:1 correspondence between the increment of n^x and the increment of the exponent near x = 0. It is, by definition, the mathematical constant e. If you’re unfamiliar with this property, it’s easy to show it numerically; if we choose a small Δx = 0.0001 and calculate the rate of change near x = 0, we get:

We can also illustrate this on a plot of y = e^x. The slope of the resulting curve is 45° near x = 0, suggesting that the function briefly behaves the same as y = x:

In the domain of real numbers, the rate of change of e^x increases in tandem with the value of x; that’s the nature of exponential growth. But in the realm of complex numbers, we have already asserted that a real value raised to an imaginary power results in constant-speed rotation, not runaway growth. We must conclude that the rate of change is dialed in solely by the real part of the exponent, which is always zero in the formula we’re trying to build.

This means that the scaling-factor-free solution we’re looking for is just:

The observation also gives us the value of log_e(i) = ln(i). Per the earlier discussion, switching from i to base e entails multiplying the exponent by log_e(i). In this instance, the multiplication evidently cancels out the 2/π factor associated with the original base, so ln(i) must be π/2 · i, or about 1.571 · i.

That’s it. Again, it’s not a real proof: the argument contains a couple of appeals to intuition. That said, I like this chain of thought better than the usual explanations found on the internet.

As to why all these constants come together, the basic answer is that complex numbers are a two-dimensional geometry — and that radians, i, e, and π describe similar things.

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The diode is given neither the mathematical rigor of linear circuits nor the red-carpet treatment of the transistor. To the extent that the component is marveled at all, it’s usually in the context of exotic inventions such as the Gunn diode or the tunnel diode — both of which are almost never encountered in real life.

Today, let’s pay the “normal” diode a small tribute.

The mechanics of diodes

If you’re rusty on concepts such as voltage, current, or impedance, I suggest reviewing this article first.

In an earlier post about the physics of semiconductors, I noted that pure silicon is a poor conductor of electricity. This is because the material lacks long-lived, mobile charge carriers. Some conduction is still possible due to the short-lived thermal excitation of valence electrons that briefly pop into a higher-energy state, but these electrons can’t travel far before returning to a lower-energy level, so the effect is more or less negligible.

The conductivity of the material is improved by the addition of dopants. Some dopants contribute long-lived electrons that occupy higher energy levels with no lower-energy vacancies to return to; this is what’s called an n-type semiconductor. Other additives create easily-accessible valence band vacancies (“holes”); in such a p-type material, lower-energy electrons can slither around from atom to atom without needing to be knocked into a higher-energy state.

When an n-type material is brought into contact with a p-type semiconductor, higher-energy electrons from the n-side randomly diffuse to the p-side and then promptly fall into the abundant lower-energy holes. This produces a thermodynamic equilibrium with an internal electric field across the junction. There is a positive charge on the n-side and a negative charge on the p-side:

The field pushes any mobile electrons that wander into the depletion region back to the n-side. The result is a thin, poorly conductive depletion region at the boundary.

The field of a p-n junction can be offset by an externally-applied voltage; if we make the p-side sufficiently more positive than the n-side, some current will flow. In the case of silicon, the junction becomes markedly conductive when the forward voltage reaches about 600 mV, although microamp-range currents will be flowing sooner than that.

A conventional diode is just a p-n junction. The component can be thought of as a rudimentary voltage-controlled gate: when the voltage is below a certain threshold, it presents itself as a very high resistance — typically in excess of 100 kΩ — so virtually no current can flow. When the threshold is cleared, the diode begins to admit more substantial currents. The V-I curve is initially exponential, but before long, the inherent resistance of the material begins to dominate. From that point on, the current has a roughly linear relationship with the “excess” applied voltage:

My assertion that the V-I curve isn’t really exponential may be at odds with the conventional wisdom of EE textbooks, but the discrepancy is pretty clear to see in the plot that uses log scale for current (right). An exponential relationship between current and voltage would produce a straight line. In reality, the plot curls markedly past perhaps 10 mA.

So far, we discussed a condition known as forward bias. If the diode is reverse-biased — that is, if the p-side is more negative than the n-side — the component notionally remains nonconductive. Well… up to a point.

One of the possible reverse-bias scenarios is that if the reverse voltage becomes high enough, the electric field can accelerate the odd charge carrier in the depletion region to a point where the particle knocks other electrons into conduction band, producing an avalanche-like effect. The abundance of these kinetically-generated charge carriers makes the junction unexpectedly conductive again.

Most diodes are designed to keep this reverse breakdown voltage well outside the device’s intended operating range. A special category of components — known as Zener diodes — is engineered to exhibit reverse breakdown at lower, carefully calibrated voltages. Either way, once the threshold is exceeded, a reverse-biased diode starts conducting just fine:

Now that we have the basic theory laid out, we can have a look at some of the common uses of diodes.

Circuit protection

About the simplest application of diodes is circuit protection. Let’s start with the arrangement shown on the left:

In the first circuit, a Zener-type diode is placed in reverse bias between a protected line and the ground. The diode remains non-conductive under normal operating conditions, but experiences electrical breakdown — and thus temporarily starts conducting — when the input voltage exceeds a safe limit. In effect, the diode acts as a crowbar that dissipates energy and protects more delicate components downstream. Diodes designed for this purpose are often marketed as transient voltage suppressors (TVS) and are particularly important for protecting semiconductors against static discharge. Another application is the suppression of voltage spikes that happen when we abruptly cut the current supplied to motors and other inductive loads.

A single diode can only be used to protect inputs where the input signal has a defined polarity – that is, where one rail is always more positive than the other. To provide overvoltage protection for AC signals with alternating polarity, we instead rely a two-diode arrangement shown on the right in the illustration above. This arrangement of components is also available in a single package known as a bidirectional TVS.

In the latter circuit, regardless of the polarity of the applied voltage, the “crowbar” path always consists of a forward-biased diode in series with a reverse-biased one. It follows that positive and negative conduction thresholds are the same: they’re equal to the diode’s reverse-bias breakdown voltage, plus roughly 600 mV.

Yet another protection technique is shown in the bottom panel. A regular forward-biased diode with a high reverse breakdown voltage is placed in series with the supply; this arrangement prevents damage to sensitive components if the polarity of the supply is accidentally reversed, for example if the batteries are inserted the wrong way. The trade-off is the inevitable voltage drop across the p-n junction, along with resistive heating if the current is high, so a transistor-based solution is typically preferred, especially in low-voltage circuits.

Diodes as voltage references

As mentioned earlier, most diodes are designed to withstand very high reverse-bias voltages, often in excess of -100 V; that said, a special category of products — Zener diodes — is designed to start conducting earlier than that.

When forward-biased, such a diode behaves the same as its conventional counterpart, becoming markedly conductive around 600 mV. When reverse-biased, it starts conducting at a higher voltage of manufacturer’s choice, with common options ranging from 1.8 V to 30 V.

The V-I plots shown earlier in the article tell us that once reverse breakdown begins, a small change in the applied voltage can produce a comparatively large swing in the current flowing through. We can also look at it another way: if the current through the diode is limited in some way, fluctuations in that current will have a comparatively minor effect on the voltage that develops across the diode’s terminals.

This observation lends itself to the use of diodes as voltage references. We take an unregulated power supply — for example, a battery — and in the simplest variant, use a resistor to roughly limit the current flowing through the diode. Depending on the voltage you want, you can use one or more forward-biased diodes, a reverse-biased Zener diode, or some combination thereof.

From Ohm’s law, the current admitted by the resistor will change linearly with the supply voltage (I = V/R), but these current fluctuations affect the diode voltage to a much lower extent. Here’s an experimental plot for the circuit constructed with a 1N4733 diode and a 100 Ω resistor:

The swing of the output voltage is under 5% of the fluctuations of the input signal: 45 mV versus 1 V. This figure might not sound particularly impressive, but the circuit can be cascaded: the output of one resistor-diode voltage reference can be used as the supply voltage for a second one. The effects stack up: 5% of 5% is equal to 0.25%.

Of course, the Zener voltage of the first diode should be higher than the second one. Further, for the cascaded layout to behave correctly, we need to make sure that the current siphoned off by the second stage is much lower than the current flowing through the intended resistor-diode path. One way to ensure this property is to choose R1 ≪ R2. Another solution is to separate the stages with a transistor circuit that mirrors the output voltage of stage 1 for use by stage 2; such voltage follower circuits are discussed here.

Nowadays, more complex transistor-based circuits with temperature compensation are favored for precision applications. Nevertheless, a Zener diode still offers a viable a solution in a pinch.

Rectifiers and envelope followers

Let’s consider the circuit shown below:

This circuit is called a half-wave rectifier. The analysis is the easiest if we reference all circuit voltages to the bottom output leg marked as B, and then evaluate the positive half-cycle of the input AC waveform separately from the negative half-cycle:

During the positive half-cycle of a sine wave – when the upper terminal of the supply sits at a higher voltage – the diode is initially forward-biased. Assuming a low-impedance signal source, this allows the capacitor to charge to a voltage equal to the peak amplitude of the input signal, minus some diode voltage drop.

When the polarity of the signal is reversed – making the upper supply terminal more negative – the diode becomes reverse-biased and doesn’t conduct, so the capacitor holds charge. The following is a discrete-time simulation of the process; I added a modest resistive load across the output terminals to discharge the capacitor slightly in between each positive peak:

If the load resistor is made a permanent part of the circuit and if it’s chosen so that the capacitor discharges quickly enough to keep up with the amplitude modulation of a carrier wave, we get a circuit known as the envelope follower. The circuit is a simple way to extract the approximate modulating waveform from the carrier signal in AM radio circuits:

The same principle can be used if we want to build a circuit that measures the approximate loudness of an audio signal, or more generally, hones in on the slow-changing component of any composite waveform.

The drawback of the half-wave rectifier is that the capacitor is only charged by the positive half-cycle of the sine wave; this is wasteful if the goal is to maximize the power delivered to a load. This deficiency can be addressed by constructing a full-wave rectifier, shown below:

Once again, the analysis of the circuit is the simplest if we consider output B to be the reference point:

During the positive half-cycle, diodes D1 and D2 are initially forward-biased; this allows the capacitor to charge to the AC peak voltage (minus the summed voltage drop of two diodes). During the negative half-cycle, diodes D3 and D4 become forward-biased, which connects the output B to the upper supply terminal. Meanwhile, the bottom supply terminal, which is currently at a higher voltage, is connected to point A. This allows the capacitor to continue charging in the same polarity as before.

A simulation of the process is shown below:

Voltage doublers

The rectifier circuits outlined in the preceding section use diodes as voltage-controlled switches. Another application of the same principle is a circuit known as the voltage doubler.

There are many flavors of voltage doublers, but one particularly clean design is shown below. The circuit outputs a DC voltage that is equal to twice the peak amplitude of the zero-centered input waveform, minus the usual diode voltage drops. This in contrast to the rectifier circuits discussed earlier on, which only produce DC voltages in the vicinity of the peak amplitude:

This time, let’s use use the midpoint between the two capacitors as the reference point for voltage measurements. During the positive half-cycle of the AC signal (panel on the left), the upper diode (D1) can conduct to charge the top capacitor. This puts the output terminal A at a positive voltage in relation to the midpoint.

Next, let’s have a look at the negative half-cycle (right). In this scenario, the top diode is always reverse-biased, so it doesn’t conduct; C1 retains charge. At the same time, conduction is possible for the lower diode D2, which charges C2 so that the output terminal B ends up at a negative voltage in relation to the midpoint. In effect, we store the positive peak voltage of the input waveform in C1 and the negative maximum in C2. The total voltage between B and A is V_peak · 2 (once again, minus the expected diode voltage drops).

This method of multiplying voltages with switched capacitors lives on, although modern circuits typically use digitally-controlled transistors instead of diodes; this avoids voltage drops and eliminates the need for an AC voltage supply. If you’re interested in such circuits, I have a separate article here.

DC restorers

Most of the time, alternating waveforms that are centered around zero volts are inconvenient to work with; in particular, it’s more challenging to build circuits that run off a single voltage supply but that are able to discern, amplify, or generate signals that extend below the negative supply rail.

This brings us to a somewhat mind-bending alternative approach. The circuit is known as a clamper – or, less cryptically, as a DC restorer. It takes an AC waveform and shifts it so that the negative peaks are at roughly zero volts, with no appreciable impact on signal amplitude:

For now, let’s ignore the optional resistor. We start with the first positive half-cycle of the input sine wave (top left). Initially, the capacitor is not charged (V_cap = 0 V); further, there’s no current path via the diode, so charging is not possible. To elaborate: for energy to be stored in a capacitor, there must be a symmetry in the motion of charges flowing onto and off the plates. This way, the resulting electrostatic fields – increasingly positive on one plate and increasingly negative on another – largely cancel out, allowing a non-trivial charge to be moved with the help of a modest voltage.

If one of the capacitor’s is left floating, the device can’t be charged or discharged; instead, its previous charge state persists as a voltage across its terminals. If we take a capacitor charged to 1 V and connect one of its legs to a 10 V supply, the other leg will read 11 V in reference to the ground. If we connect it to a -5 V supply, we’ll get a reading of -4 V. It’s no different from putting a battery in series with another voltage source. In our circuit, the initial V_cap = 0 V, so in the positive half-cycle, the capacitor adds nothing, and the voltage on the output leg A simply follows the input waveform.

In the following negative half-cycle, once the voltage at point A reaches about -600 mV, the diode starts to conduct (top right). This clamps the voltage at point A while simultaneously allowing the capacitor to charge so that its left terminal becomes negative in relation to the right terminal. If we measure V_cap left to right, the resulting voltage is positive and is equal to the peak amplitude of the supply signal (minus the diode voltage drop).

In the subsequent positive cycle, the diode becomes reverse-biased again, so the capacitor must hold its previous charge; this means that V_cap remains unchanged and that the voltage at point A is necessarily offset from the input waveform by that amount. If the input waveform runs -V_peak to +V_peak, the output will be now moving from roughly -600 mV to V_peak · 2 – 600 mV.

The role of the optional load resistor is that it controls the circuit’s ability to respond to gradual shifts in signal amplitude. Without it, the circuit would theoretically be stuck forever at a voltage offset dictated by the largest encountered single-cycle swing in the input waveform. With a resistor, the capacitor can discharge over time, so the offset can change if the envelope of the waveform changes in some way.

In practice, the diode’s leakage current and the capacitor’s self-discharge rate are typically enough to make the circuit behave reasonably even without an output resistance. If you wish to play around with this layout, I recommend using a 10-100 µF capacitor and either skipping the resistor or using a large one (1 MΩ).

Diode-based logic

An OR gate is a circuit with two or more inputs that produces a positive voltage when any of the inputs is positive. An AND gate, in contrast, outputs a positive signal only if all the inputs are positive. Many readers are probably familiar with the application of this concept in computing, but more simply: a practical application of an OR gate might be a circuit that raises alarm if any of the door or window sensors are triggered. An application of an AND gate might be a system that illuminates a “PARKING FULL” sign when all the spots are occupied.

There are simple ways to implement this logic with diodes:

In the case of an OR circuit (left), if the positive supply rail is connected to any of the input terminals, this forward-biases the corresponding diode and causes a current to flow through a resistor. Because the impedance of a forward-biased diode is much lower than that of a 10 kΩ resistor, the output voltage shoots up very close to the upper supply rail.

The AND circuit (right) essentially works in reverse: if any of the inputs is connected to the ground, this pulls the output voltage close to 0 V, so the output is positive only if both inputs are high (or are left floating).

The reason I put “gate” in scare quotes in the illustration is that the circuits are not readily composable to implement more complex digital logic; each of the gates requires current to flow through the input terminals, but it can’t necessarily deliver such currents on its output leg. A particularly troublesome situation is shown below:

With the input signals as indicated in the drawing, three out of four diodes are reverse-biased; the only current path is the series resistor-diode-resistor connection between the positive supply rail and the ground. The circuit is essentially a resistor-based voltage divider; instead of providing a binary output, it produces an ambiguous intermediate voltage.

In other words, the solution works for single-step logic; to build real computers, we’d need gates that can deliver output currents higher than what they demand as input of the gates upstream.

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The feature we regretted not incorporating from the get go was an automatic inner door for the fully-enclosed box where the chickens nest and sleep at night. This would have allowed us to leave for a couple of days without needing anyone to stop by to let the chickens in an out.

There are some ready-made solutions for this, but they all require tearing out the existing hinged door and replacing it with a garage-door-style mechanism. Well, UNTIL NOW!

Here’s the device in action, with some added cat- and chicken-related comedy:

In the video, I’m covering the front-facing light sensor for about a minute to simulate dusk and trigger the closing of the door.

What I liked about the project was not that it was challenging. Quite the opposite: modern technology made it much easier and faster than what would have been possible 2-3 decades ago.

I started with a relatively cheap but well-sealed and all-metal worm gear motor (Amazon product link). The motor needs 12 V, idles at 30 RPM, and delivers about 35 kg·cm of stall torque. The output shaft is coupled to an 8 mm universal joint to make a 90° turn. This angle locks the joint; it was just the easiest way to couple the motor to an 8 mm stainless steel rod without any welding or machining. The other end of the rod goes through a stainless rod-end bearing that’s screwed directly into the door. The total cost for the merchandise was around $35.

On the control side, the electronics are housed in a cast aluminum project box with a sticker made on a vinyl cutter and with several holes drilled for “emergency” manual operation buttons (TE PB6B2HS6M3CAL00), along with a a waterproof power switch (CW industries CW246-ND). I also added a fitted acrylic window for a photoresistor secured with a glob of translucent silicone.

The control circuit is exceedingly simple:

Power for the device is provided by a Meanwell APV-35-12 PSU ($7.50). This is housed in a separate electrical box, wired directly into the mains. The PSU outputs 12 V DC at up to 3 A; this is then converted once more to 5 V for the ICs. For that last task, I used a PXO7805-500-S switcher because I happened to have one in the drawer; that said, almost any linear or switching regulator should do.

Supply decoupling is done in a standard way, with a bulk electrolytic cap and a high-speed MLCC on both sides of the regulator, and one MLCC physically close to the main logic chip. Also note the use of a Wurth 74275043 ferrite bead to isolate the supply of 12 V to the motor; it’s probably an overkill, but it contains high-frequency spikes to that portion of the circuit much better than a capacitor could.

The main light-sensing element is Advanced Photonix NSL-A6009, a fairly standard cadmium selenide (CdS) photoresistor with a resistance specified at 4-11 kΩ for 10 lux; in practice, it reads 10 kΩ right around sunrise and 400 kΩ just as the night falls. This element is connected to the ADC input of a Microchip AVR Dx series 8-bit microcontroller. A sub-$1 unit, such as AVR16DD14, should be more than enough.

Back in the day, a circuit like this would be implemented without programmable logic. That wouldn’t save us any money or time; further, we’d inevitably lose some flexibility with the operating plan. In my design, I rely on MCU pulse-width modulation to operate the motor at roughly 25% the speed and torque for the bulk of the movement; this avoids startling or pinching the chickens, but still lets me ramp it up to 100% for the final seal (when closing) or the initial pull (when opening). The scheme should hopefully make the device more reliable in the presence of dirt, snow, or ice.

The microcontroller is interfaced to a Texas Instruments DRV8231 motor driver; this is a yet another $1 part that takes place of wear-prone relays or a more complicated, multi-component H-bridge control circuit of the old. The chip uses current sensing and internal PWM to further limit stall current. The potentiometer that sets the current can be adjusted to avoid crushing the chickens even if all other safeties fail.

The program running on the MCU is even simpler than the circuitry. Source code can be found here; in a nutshell, it configures the ADC for 10-bit single-ended operation and then accumulates 10 measurements in a bit over a minute to decide if it’s day or night. At dawn, the voltage at the midpoint of the resistor ladder formed by the LDR and a series 100 kΩ resistor is:

…which corresponds to an ADC reading around 90/1024. If the measured resistance is lower, the system assumes it’s daytime and opens the door.

After dusk, the voltage is:

This corresponds to an ADC reading in the vicinity of 800/1024. If the reading is higher than that, the system assumes night and shuts the coop door. The hysteresis afforded by the wide spacing of the “open” and “close” conditions prevents erratic behavior if the illumination level fluctuates a bit.

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