What's in an op-amp?
The internals of operational amplifiers are not explained well on the internet. Let's change that.
In an earlier article on signal amplification, I discussed a couple of basic transistor amplifier circuits and then introduced op-amps as a better-behaved version of the same. This left one question unanswered: what’s inside an op-amp, anyway?
It’s easy to give a superficial answer. A typical operational amplifier has three main parts: a differential input stage, a voltage amplifier, and a push-pull output circuit. We covered the latter two in the previous article, and it’s tempting to wave away the first bit too.
Yet, the differential stage is a pretty interesting animal. At its heart lies an arrangement of transistors known as the long-tailed pair, and an accurate explanation of its mechanics is hard to come by. I’ll try to address this in the following article — but let’s start with a brief detour.
The I-V curve of a field effect transistor
Let’s consider a typical n-channel MOSFET. We know that it’s a voltage-controlled device: that is, a voltage signal applied to the gate terminal (Vgs) modulates the flow of current between the two other terminals — drain and the source (Id).
From this description, one could assume that FET is just a variable resistor: a device where the gate voltage dials in a specific drain-source resistance, and where that resistance stays roughly the same no matter what voltage (Vds) is applied to the remaining terminals. If that model is true, the drain-source I-V plot for a given gate voltage should look about the same as it does for a resistor:
The diagram, captured for a 10 kΩ resistor, makes perfect sense: I = V/R, so if R is constant, the current through a resistive load should be directly proportional the applied voltage.
But that’s not at all what happens with a FET! Don’t take my word for it. I recorded the following curve for a common BS170 transistor at Vgs = 2.25 V (this voltage was chosen empirically to maintain the same scale for both plots):
As it turns out, the resistance of a FET is strongly dependent not only on the Vgs input signal, but also on the potential between its drain and source terminals. In particular, for any given Vds past a modest threshold, the transistor appears to be a (nearly) constant-current device. In the plot, the current stays at 800 µA +/- 10% for Vds all the way from 0.5 to 9 V.
The long-tailed pair
Keeping this detail in mind, let’s get back to op-amps. As mentioned earlier, the essential building block of most differential amplifiers is the long-tailed pair; its simplest variant, drawn with n-channel MOSFETs for consistency with the earlier article, looks the following way:
The circuit consists of a pair of voltage followers sharing a common resistor on their low side. Each transistor will conduct only if the voltage on its gate terminal is sufficiently higher than the voltage on the source terminal. In this arrangement, it will admit only as much current as needed for a voltage proportional to Vgs to build up across R2. In particular, if input A is higher than input B, the transistor on the right side will cut off before the one on the left. In this case, entire current will be ultimately sourced via the left branch of the circuit, and the output terminal will stay at Vdd.
In the inverse situation (A < B), the branch on the right ends up doing all the work, so there will be a voltage drop across R1, and the output terminal will be pulled down. Finally, if A = B, both branches should be chipping in, so the output voltage should at a midpoint between the voltages associated with A < B and A > B.
At first glance, this might sound like the behavior of an op-amp, and many online sources try to pass it off as such. That said, the circuit has a fatal flaw: its output voltage doesn’t depend only on the difference between A and B. The current that must flow through R2 to produce a sufficient voltage drop scales in proportion to the higher of the two input voltages. This causes the voltage drop across R1 to fluctuate wildly. In fact, it can be outright impossible to distinguish between A < B and A = B.
A workaround is hinted at in the very name of the circuit: it has a “long tail” because in order for the amplifier to behave correctly, you need to maintain ample distance between the lowest permissible input voltage and the negative supply rail. For example, in a 12 V circuit, you will have few worries if your inputs are restricted to between 11 and 12 volts. This is because on both ends of this range, a significant voltage drop is created cross that R2 tail; the current through the resistor varies very little, keeping the circuit well-behaved.
Toward a shorter-tailed pair
Of course, this constraint is rather severe, especially in the age of single-supply electronics that commonly run off as little as 3.3 volts.
To improve this circuit without sacrificing its input range, it would be necessary to replace R2 with a device that can recreate a wide range of voltage drops while requiring only fairly modest current swings.
Well — that’s our cue to wheel out the previously-discussed FET I-V curve:
As seen in the graph, a range of voltage drops ranging from 1 to 9 V (x scale) can be created by varying current by as little as +/- 10% (y scale).
A single FET with a carefully trimmed gate voltage can be used as a drop-in replacement for R2. That said, its characteristics will drift in response to factors such as ambient temperature, so it’s best to add some sort of a feedback loop. One such circuit — known as the current mirror — is shown below:
For a moment, let’s focus only on the part on the left. At first, there’s no current flowing through the transistor, so the drain terminal quickly shoots toward Vdd; so does the gate terminal, prompting the transistor to start conducting. This, in turn, creates a voltage drop across R, eventually pushing Vgs back toward the cut-off region. An equilibrium is reached when the transistor is admitting I = (Vdd - Vth) / R.
In isolation, this is a pointless trick, but there is a carefully matched transistor on the right. It has no feedback mechanism, but is supplied with the same gate voltage — and therefore, should admit the same current through the connected load, increasing or decreasing its own resistance to match.
This particular current mirror is tied to a fixed reference on the left side of the circuit, so it becomes what’s known as a “current source”. This term is somewhat sketchy because the device is not a source of any electromotive force in the sense that a battery is; rather, it’s just a variable resistor that tries to maintain a steady flow of electrons whenever attainable. But I digress.
Current sources have their own (uncommon) circuit symbol, so a revised version of the not-so-long-tailed pair might look this way:
Of course, if one wishes to avoid the Vgs < Vth dead zone of n-channel MOSFETs without biasing the input signals, it is possible to build an upside-down variant of this circuit with p-channel MOSFETs; or to work with JFET transistors that don’t exhibit a gate-to-source voltage threshold at all.
Either way, we now have all the components to build a rudimentary op-amp.
Postscript: op-amp input and output considerations
In the earlier article on signal amplification, we have discussed the importance of parameters such as bandwidth or slew rate.
Many other basic DC characteristics, such as an op-amp’s minimum and maximum supply voltage, or its maximum output current, probably require no explanation. That said, there are four other, less obvious parameters worth paying attention to in the datasheet:
Voltage output swing. Many modern “rail-to-rail” op-amps can generate output signals spanning the entire range of supply voltages. Some older or more specialized chips do not. In particular, antiquated devices such as LM741 exhibit clipping once you get within 2-3 volts of either supply rail. That’s why old-school op-amp schematics commonly feature cumbersome power supply architectures, such as dual +15 V / -15 V supplies.
Common-mode input voltage range. Similarly to the situation with output voltages, not all op-amps behave predictably if their inputs get too close to the supply rails. Chips described as having “rail-to-rail input/output” (RRIO) are safe; other ICs might need to be treated with some care. The symptoms of inadvertently exceeding the maximums can range from no perceptible effect, to clipping, to output signal reversal. Older designs tend to be less predictable.
Differential input voltage range. Most op-amps do not place additional constraints on the maximum allowable voltage difference between inverting and non-inverting inputs, but this is not universally true. In particular, if an op-amp features protection diodes placed across its inputs, exceeding 600 mV will cause an unexpected current to flow:
While op-amps are usually operated with both inputs held at about the same voltage, the circumstances may differ at start-up, in the presence of fast-rising square wave signals, or if the op-amp is used as a voltage comparator without a feedback loop.
Differential input impedance (aka resistance). Op-amps that use bipolar junction transistors in the input stage might admit a small input current whenever the input voltages are not equal. This is distinct from the diode behavior — and in the worst case, might manifest as an apparent impedance of several kΩ on the input pin. The behavior usually isn’t present in FET input amplifiers.
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To review the entire series of articles on analog and digital electronics, check out this page.